new ixemul V63.1 Version

[matthey]

@amigagr
Knowing Bernd, it's probably compiled for the 68060 without bitfield instructions. This should be compatible with the 68040 although is not optimal. It should work on the 68020 and 68030 with good speed but there is a much greater chance of incompatibility if floating point is used. Bernd leaves out the bit field instructions because they are slow on UAE and the GCC compiler does not make good choices of speed trade offs when deciding to use. The 68040 would probably benefit from them though. My best answer to your question is probably and try it. Bernd might offer some different advise though.

[matthey]

@amigagr
Quite possible. If your friend has a 68881 or 68882 it might work. There are a few new fpu instructions in the 68040+ that aren't really necessary (fdxxx and fsxxx). If that is the case, then he might ask Bernd to compile a different version. If he doesn't have a fpu then he is most likely going to crash.

@Karlos
Yes, the bit field insructions are often slower for simple shift and mask even on the 68040. A bf instruction usually needs to replace at least 3 shift and mask instructions on the 68040 to be faster. Shifting and rotating is not the strong point of the 68040. The 68060 can usually do the shift and mask in 1 cycle yet the bf instructions are about the same speed as the 68040. Therefore, the 68060 usually needs to replace 6 to 18 shift and mask instructions to be faster. That makes most of the bf instructions not very useful for time critical code on the 68060. bfffo and bfext are exceptions if branches would be needed with the replacements. A missed branch (always occurs on a loop) still takes 7 cycles on the 68060 which is about what a bf instruction takes. GCC uses the bf instructions about right on the 68040 but way too much for the 68060.