MPX<->"Elastic bus(?)" [What's Apple's name for the new one, anyway?],
I think it is API, Apple Processor Interconnect. Designed by Apple and made/implemented by IBM.
It's something like that, anyway.
Don't forget that the PPC970 supports many multiples. So one could possibly run a 2.0 GHz PPC970 with, what, a 500 MHz FSB? I forget the exact multiples but a motherboard manufacturer might be able to take some "shortcuts" if the high FSB is an issue.
(FSB meaning the p2p CPU connections to the northbridge, not to include the memory bus or PCI bus, etc.)
