This is slightly off-topic, but people might want to take a look at Stanford's
ELM architecture. They've identified that 70% of all power in a CPU is taken up by loading data and instructions. The ELM architecture is designed to lower that significantly, and they claim that it's power consumption is as little as 3x what an ASIC implementation for a task would be (i.e., the same algorithms implemented as software on the ELM vs an ASIC based design). This is down from 50x for typical CPUs.
Hans
