Minimig PCB run - interest thread

[Hans_]

Because I'd be into experimentation, I'd be looking for a board with full 24-bit RGB out (so I can have a go at an AGA implementation), an IDE port, 68020+ processor, and possibly a CPU bus. Basically, the A1200 equivalent of the Minimig (minus clockports and other similar stuff. That would be a fair amount of work though.

For those who just want a working Minimig, Dennis' current design should be fine.

Hans

[Hans_]

freqmax wrote:
ATA (IDE), ZorroII, SCSI all wants a large number of I/O pins. There a currently 4 remaining. A few more possible by reusing boot configuration pins. Getting larger fpga means BGA and that is a path you don't want to go.

But fpgas are capable of really fast communications, esp the standard spartan3. So a possibility is to use the leftover I/O to connect another fpga to hookup these things. Essentially a "south bridge" running on a pseudo serial bus.

Not minding the cost of an extra fpga, special copper trace requirements, support circuitry, power, and connectors.

Alternately you could connect the Zorro bus bridge directly to the CPU bus, leaving the FPGA to do the rest of the chipset. Using a serial link to another FPGA (or even a CPLD) would be fine for slower peripherals such as IDE.

Hans

[Hans_]

jkonstan wrote:
What could be different and may cause an issue between these SRAM parts is ground/VCC bounce since the PCB is only 2layer and lends itself to a higher inductive volatge drop Ldi/dt on the power and ground connections to the ICs. We can only tell this by testing some of these SRAM parts in an actual 2layer MiniMig PCB.

Sticking a decoupling capacitor right next to the SRAM chip should solve this problem. If the  Most datasheets have some kind of recommendation for decoupling/circuit-layout that you can follow.

Hans

[Hans_]

jkonstan wrote:
The decoupling cap next to the IC will help VCC dip/bounce; however, it will not help with ground bounce. Ground bounce is fixed by use of a low L inductance ground path connection for the IC/SRAMs (i.e. a ground plane).

 :-)

Actually, it helps with both VCC dip/bounce and ground bounce as it provides a low-inductance path for transient currents on both sides. If you draw out the circuit schematic for a decoupling-capacitor connected to an IC, you'll see that it affects both VCC and ground.

A ground plane is still a good idea. You should be able to create a reasonable ground plane on a 2-layer board if you keep most signal lines on one side and keep any signal traces on the lower layer short.

Hans