From my knowledge, the goal is emulate only the bad instructions, but even this way, you have to emulate the supervisor mode of the CPU.
So here is the catch: construct a resident-hardware interpreter outside the Amiga memory space (a simple "mini" Spartan or other FPGA can do this) and, with the right code, forward to the CPU only the "good code" untouched. Almost the same approach as a table interpreter.