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Author Topic: Description of reset 'sequence'  (Read 5944 times)

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Offline SHADES

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Re: Description of reset 'sequence'
« on: June 24, 2005, 09:29:00 AM »
@ Doobrey

Nice, can you elaborate a little further, which address lines get checked, do they pull low, bus restes CPU check what initalise pins etc?? Seting up of IRQs??

All that kind of detail is very welcomed for someone like me doing repairs. I have had so much trouble finding this kind of detail, I have schematics and that helps, but the initalisation sequence stuff, Please, if you have time, go though step by step and submit it!!
It's not the question, that is the problem, it is the problem, that is the question.
 

Offline SHADES

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Re: Description of reset 'sequence'
« Reply #1 on: June 28, 2005, 12:04:30 AM »
@Doobrey
Thanks for this. I need to know at what point these things are initalized. I.E. What part of the initalization sequence does the IRQs get initalized and by what pin of what chip and how, and what correct voltages should be present etc. That's the thing, I need detail. I have Hanies archive and I have had to write down some for myself through trial and error but as you are aware, there are very few AMIGAS being used now and I'm not asked to repair that many 4000s any more. It's been years since I have had a working 4000. If I had one, I could compare the two and repairs would be a hell of a lot quicker and easier. Just got to track it all down somehow. Rob from AmigaTechnologies Aus used to have it all, but he dissapeared and took all this info with him. Such a shame!! could be so useful!!! just post notes on to the net or aminet, anything!!
It's not the question, that is the problem, it is the problem, that is the question.