ADOOM on A600 running 22-35 FPS

[biggun]

The Phoenix core offers excellent performance/price for Amiga hardware.

Thanks
 

An FPGA is too expensive to make it cheap enough for mass produced hardware like the Raspberry Pi

What would be the pricepoint in your opinion for the FPGA/ASIC?

Lets say we wanted to build a new retro AMIGA with 600 MHz 68020 performance, fast FPU
256 MB fast memory, SAGA (truecolor) chipset ...
What in your opinion is the price break for the FPGA of such a system?
At which price you would say the FPGA is ideal for this?

[biggun]

Looking at current FPGA stand alone boards, we see a price of $200-$300 U.S. for good quality boards with low to mid range Amiga specs. .

you compare apples and oranges.
The current FPGA boards for AMIGA have quite  high prices for what they offer.
That these board have so high prices DOES NOT mean that an FPGA is more expensive than an ASIC.

An FPGA board with 256 MB fastmem, and 68020 CPU with 600 Mhz performance and SAGA could today be sold for less than $100. If a few thousand would be produced.

[biggun]

I hate to say it but it would have to be around $200 to sell big (relatively speaking).    You can already buy an awesome retro computer for $50.

You'd still sell some at $500 but not that many I think

I could give you this for $200 today easily.

[biggun]

an ASIC that could lower per unit board costs by maybe 25%-50%

What makes you think this?
What do you think that an FPGA to build something comparable to ARCADE or MIST does cost?
What do you think would an ASIC cost?

and increase performance by several times.  

Yes this is true.
An ASIC would in theory allow huge performance gain.
But to be able to build an ASIC the design needs to be 100% tested and you need to be 100% sure that you have all good ideas implemented. Also it needs to be clear that doing an ASIC release includes porting to ASIC libraries. This wil also be some work and take weeks if not month.


Before looking at an ASIC I would first try to get the max out of FPGA options.

With todays Vampire600 you get 200 MHz 68020 speed.
With the new ApolloCard we think to get around 600 MHz 68020 speed
With todays better FPGA you could get over double of this. E.g 1200 MHz 68020 Speed.

The new FPGA generation which is on the horizon looks impressive.
My first impression is that performance could again be double t´with them....

I would like to see how good the next gen low cost FPGA will be.
If we could get out of a $15 FPGA 1200 MHz 68020 Speed - then I do not think that an ASIC is really needed for World domination ...

[biggun]

The 68030 MMU is very flexible and has some interesting ideas but is far from modern MMUs. The 68040 and 68060 MMUs are similar and very capable but the page sizes only go up to 8kB which is small and not optimum for modern large memory sizes. Enlarging the page sizes would break compatibility with the 68040 and 68060 MMU and there may be other changes necessary to modernize it.

Matt is 100% correct here.

The 030 and 040 MMUs are first of all - incompatible.
From a todays view point both are not perfect and you would want to improve them with a new MMU design.

And of course your "ideal" MMU very much depends on what you want to do.
The "ideal" MMU for Linux looks different than the "ideal" MMU for AMIGA OS would look like.

I can not image that someone will seriously want to run Linux on 68k
But of course the beauty of the FPGA is that - one could create in theory 2 MMU designs -
one tuned for AMIGA OS and one tuned for LINUX And the people can pick their Core version for runnig in their FPGA.

[biggun]

i am asking around in various relevant communities, it would be nice if the http://www.apollo-core.com pages could say a little more about compatibility (68020 instructions) and about your MMU plans.

when you say "communities" how many people are these roughly?
what hardware systems are they using exactly?

[biggun]

I need to do counting too?

Well, there's Amiga and Atari peeps obviously, running you know what. There's the NeXTStep die hards using NeXTStation and Cubes, there's people who enjoy firing up unixen for old (*gasp*) Apollo computers, there are people keeping their old macs alive for A\UX and ditto for old SunOS. Then are there people like me who happily run Linux and *BSD on anything that has a capable m68k inside, from old Macs, Amigas, Ataris, Motorola VME boards... anything. How many all these add up to? No idea, but certainly way lot more than Amiga folks alone.

The question was how many people use what computer system.
If you have 1000 people using an A1200 and wanting to upgrade then it can make sense to design a new accelerator card for them.

If you have 40 people using system A, 30 people using system B, 50 people using symtem C, 60 people using system D .... and so on ... then you might in total have many people but   -  but the number of different upgrade cards to design would kill you.

Can you give me a feeling how many people and how many cards you talk about?

[biggun]

Kolla,

You have to see we test every card with a real system,
If got an A1000, two A2000, an A4000, three A500, two A300/A600, two A1200, a CD32 here to be able to test the Core and bus controllers on different systems.
And the above is only my test setup - the others in the team also have many systems to test.

There is a logical limitations how many more tests system I can setup before my beloved wife will kick me.

For the Linux fans how much sense would it make to hold out for the upcoming  stand alone system?

[biggun]

All the nice features like kickstart remapping, zero-page remapping or MuRedox require a logical addressing that is different from physical addressing. You could hard-code such cases in the FPGA,

Good examples.

You can solve this in different ways.
It really depends on what feature you focus on.

For example:
1) You could have a very simple flat design where the whole memory is mapped in 4K pages.

2) You could have a hirarchical design with for example 512 KB size top level entries, and below 4 sub level entries.

3) You could implement this not with an MMU map but with a number of programmable mapping registers. Just like the EC chips did have them. You could make those register really flexible to allow programming of mapping or snooping of any size.  For example you could say I have here at $54321 and memory array of size 11 bytes  I want to snoop any access to it.


Option 3) is very useful for programming, testing and debugging.
I use this feature in Phoenix regularly.

For a general purpose Unix  compatible MMU design option 2 will be better than option 1.
But again there are many detail questions. How many ERATs / Cache entries are needed to be able to run bigger unix programs really well?

The old 68K MMU have in my humble opinion only enough cache entries to run programs of their time. The could ran well typical 90th application - but for todays staandards I would increase the number of cache entries.

[biggun]

Gunnar, providing cards for old computers was not in my agenda. While building acc cards for old systems is pretty cool, it's the stand alone systems that are of main interest, at least for me. The question is if you can reimplement a lot of old hardware using an FPGA, so that the old operating systems will be able to run on them.

Not sure I understand the question.
If we would not put SAGA into the FPGA how could we run Amiga OS?

[biggun]

i think the only sensible might be is licensing the core to other fpga hardware providers for the time being. as example, if not for vampire the core woulnt probably be available to testers-users till now. doing everything by yourself will drain your capabilities quickly.

Our new cards are in testing already ....

 this way also the support for other systems could be hierarchically outsourced to interested parties.

I do not see the scaling benefit of this.

If you license the core to 3 different parties then this does not save you time this creates more work for you. You have to support them. Each partner might use a different FPGA, different memory. So you need to help them to interface and to test/fine tune the memory controller.
Even is you provide standard industry bus interfaces - as Apollo does.
They will have many questions which you need to answer.

I have no secretary which could answer all these customer questions.
Therefore to be honest - I do not think that this will save me time but cost me time.

[biggun]

+1

To prevent misunderstandings.
There is a lot of proting work going on already.
Right now people port/test the core to the following systems already.

Vampire-600 - CPU Accelerator for A600  - Status working
Vampire-500 - CPU Accelerator for A500  - Status testing
Apollo-Phoenix - CPU Accelerator for A500  - Status testing
HighEndC5 - Standalone System  - Status porting
Natami - everyone knows this  - Status porting
Vampire 2 - CPU Acclerator - Status in delevopment

As you see we support already 5 FPGA systems, and the 6th is current in development

I think we are already quite thin spread with our man power to support all 6 systems in parallel

[biggun]

Exactly, and for Amiga (and Atari) this is pretty much done deal, FPGA implementations of chipsets exists, but I don't this is the case for other m68k systems.

If you run BSD or Linux then you are not banging the chipset anyway.
So where is the point to have diffrent chipset for these users?
Isn't one chipset which is supported all they need?

[biggun]

Of course both BSDs and Linux are banging the chipset,

The point is on BSD and Linux all software goes through a driver - there is nothing banging the chipset directly. So on BSD or LINUX it does not matter what hardware you have. The same is true for MAC-OS.

For ATARI and AMIGA the story is different. An AMIGA without AMIGA chipset is no AMIGA ...

[biggun]

It should be possible to bake the Amiga chipset and possibly even other chipsets into the ASIC, although a small FPGA for a chipset would be more flexible.

Maybe it makes sense to sum up the difference:

CPU

in FPGA  ~ 600 Mhz 68020 Speed
in Very Good FPGA ~ 1200 Mhz 68020 Speed
+ needed investment to develop an FPGA system is low - some hundred to maybe thousand $ to get prototype
+  Bugs can be fixed in the field

 
CPU
in low end ASIC  ~ 1000 MHz 68020 Speed
in high end ASIC  ~ 5000 MHz 68020 Speed
- needed investment is huge for high end Asic the price for prototype can be in range of $200,000
- if there is a bug then the ASIC can not be fixed.
- To fix a bug again $100,000 need to be invested.



GFX Chipset
If you do the chipset well then you can get with todays entry level FPGA already super performance.
16bit CD quality audio is no problem.
FULL HD video output is no problem, 24bit truecolor is no problem,
If you do it right then having 100 times DMA performance compared to AGA is no problem with todays entry level FPGAs.

an ASIC could again improve over this.
But would have huge cost and huge risk.

I'm personally happy with FULL HD - I do not need 4K display ...

In regards of the chipset I would certainly prefer to use an FPGA to keep the risk and investments lower and to have the possibility to improve the chipset if we want to.

[biggun]

I was wondering why you take on so many things at once.Maybe it would be better to work on just one system at a time, test it and put it out -then work on the next one?

This is easy to explain.
There are several people involved in the project

Igor Majstorovic, did develop the Vampire600 accelerator card for the A600, and the Vampire500 card for the A500. These cards to exist already.


Jens Künzer owns a Terasic stand alone FPGA system.
This system offer great performance for price. The system was sold for $90
The FPGA is fast enough for 600 MHz 68020 speed.
The sys tem has audio and video out.
And comes with dual fast memory controller and 256 MB fastmem.
So he wants to bring uo this one.

Christoph Hoehne has designed the Apollo-Phoenix Cyclone 5 CPU accelerators for A500/A1000/A2000. This is a great system not only able to provide a very good speed up, but also includes GFX card update and more features.
He of course does the bringup of this card.

Thomas Hirsch - is probably well known as the inventor of the NATAMI currently tests the integration of Phoenix CORE in the NATAMI as option for people instead using an 68060.