Not a bad idea, but still the answer is no. The trouble is that Agnus/Alice has many different DMA channels and stores different addresses for each one. When Agnus/Alice accesses chipmem, there is no way for any other piece of hardware to know which DMA channel is being served, so there is no way for any other piece of hardware to provide relevant additional address bits.
Actually, that's not entirely true. As long as the OS set up the DMA it would be possible to block all bank switches until all DMA transfers finish. For a lot of things it's possible.
The problem is, the OS isn't always aware of how the hardware is setup. When you setup the copper, it just keeps trying to do it's thing without the OS. Imagine what happens if the copper is stepping through a copper list and suddenly it's replaced with some other data because you swapped RAM banks.
In *theory* you could stop the copper, save the state it's in, switch banks, setup the alternate copper list, etc...
In reality, you don't set up the hardware strictly through the OS and some hardware registers are read only. It makes it impossible to save/restore the state of the hardware for a CHIP RAM bank swith.
Even if it were possible the computer would waste a lot of clock cycles on the context switch and everything else comes to a hault just so someone can say "look what I can do". Even if it were possible, it's not practical since it would require an OS rewrite.
The whole CHIP/FAST mem thing was really sort of a hack to get around the slow buss speed of the day. Now you could design a new chipset that uses 1 buss and all RAM could be CHIP or FAST. Minimig or something like it is the only way you will ever see this happen.
