Welcome, Guest. Please login or register.

Author Topic: Zorro busmasters?  (Read 4609 times)

Description:

0 Members and 1 Guest are viewing this topic.

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show all replies
Re: Zorro busmasters?
« on: June 27, 2012, 04:35:25 AM »
There is in other words no fully working Zorro-3 implementation, ever from Commodore?
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show all replies
Re: Zorro busmasters?
« Reply #1 on: June 27, 2012, 01:59:42 PM »
The Zorro-3 standard is alright, just not the Buster implementation?

(if so then an FPGA might fix the issue)
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show all replies
Re: Zorro busmasters?
« Reply #2 on: June 28, 2012, 02:29:07 PM »
How many gates does the Buster contain approximately?
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show all replies
Re: Zorro busmasters?
« Reply #3 on: June 29, 2012, 12:37:50 AM »
If die size and scale is known. An estimate can be done. It's not just a question of if it can be done. But which FPGA model to choose. Logic capacity, tools, I/O capabiltities and chip package are intertwined.
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show all replies
Re: Zorro busmasters?
« Reply #4 on: June 29, 2012, 09:49:24 AM »
Quote from: Damion;698286
Sounds like an absolutely heinous task. How do you do a new Buster without breaking a million other things that were designed to work around the original's flaws.

I'm no hardware guru, though. Perhaps someone like Michael Boehmer would be willing to share his insight.


Seen Minimig? Replay? all using various debug tools. Once you got an FPGA wired as Buster you could use it to debug itself and peripherals.
 

Offline freqmax

  • Hero Member
  • *****
  • Join Date: Mar 2006
  • Posts: 2179
    • Show all replies
Re: Zorro busmasters?
« Reply #5 on: June 29, 2012, 10:35:00 PM »
If you make the hardware (or pay for it) I'm convinced others will take care of the (VHDL) coding side of things. The neat aspect of FPGA is that you can make it look for very specific fault conditions, not just a timing diagram or scope picture. But rather if mode X uses byte A4 bit 5 = 1 THEN "****!". And do that really fast which an oscilloscope operator can't cope with.