Could the CPU work on Fast memory while the Custom chips did DMA with the Chip memory simultainously ?
(how does "slow memory" fit in?)
Btw, Even the crappy x86 architecture
Intel 8237 could do "single mode" where CPU and DMA cycles are interleaved. And "demand mode" where transfers continue until TC or EOP goes active or DRQ goes inactive which allow the CPU to use the bus when no transfer is requested. So that professor should reconsider "not often" as x86 is "quite common"
