FPGA Replay Board

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Good luck finding such a cable!  Failing that, you can't go very wrong buying one of my VGA to SCART cables

Finding?.. Make!

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He proberbly awaits a production time slot from the assembler while doing other things @ work

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Are there enough pins on this expansion port to do floppy port directly in the motherboard FPGA? Dunno. If not, then need an addon board with another FPGA or CPLD or or Xcore or something to bridge between the expansion port and whatever you imagine connecting to it, floppy or c2n (whatever that is) in your case.

The FPGA Arcade (and proberbly Minimig too) have generic I/O pads which can be used directly with a using a few voltage level converters. And the usual power supply.

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Read the schematics and check out the pictures.

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I'll take the parts back to China on Tuesday next week and drop them off with the company which is doing the volume production.
This will actually speed up the volume deployment, but is more risky as I wanted to test the boards before paying for the set up and production stencils (which is kinda expensive).

That bad with assemblers nearby?

Otherwise try at least to get one express mailed back for verification. And send som test-jig so the manufacturer can verify.Though anything "Chinese" should be heavily quality controlled

I just hope you don't end up with a few hundred circuit boards that can't even be repaired.

The 68060 board is still being defined, although the prototype is running well. It is unlikely to have pass-through connectors for SI reasons

Use some daisy chained method instead?

6. Did I mention it's real?

It's real? I thought we all lived in the McEwen matrix..

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Complex resoldering of 50+ boards can be a pain

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C= Office?

Commodore resurrected?

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A PSU question just got me thinking. How much mean and peak power does the FPGA Replay use?

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I realize it is frustrating, and it is taking too long.

In comparision with other projects this one is at lightning speed. And there is actually hardware to deliver.

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All the other changes are layout related to improve production.

Any list of such changes? (curious )

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The base option (no SVHS/Composite) will be 199 Euro and with SVHS/Composite is 219 Euro.

Including VAT the price will be 249Euro and 274Euro for this batch.

It is possible the price of any future run will be ~20 Euro lower - that's what volume does.

My VAT registration is not complete yet, and I have paid VAT on components and assembly, so I need to charge the VAT inclusive price even to US customers for these "samples".

So this means that when the VAT registration completes you can charge 199 EUR ?

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No, but he has confirmed that he will be shipping it any time now and I have no doubt that it will arrive in time to take to the AmiWest 2011 Show with me.

Maybe UPS can be fast enough?, at least they deliver overseas from USA to Europe in 1-2 days. For a price thoe
Or if you know someone that will fly from the place where mikej lives to USA and bring it in a briefcase, it might be possible to make it?

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Natami N68k is a whole another ballgame. It's done in AHDL which is more specialized for the FPGA they use at the price of flexibility and portability. There's likely more people working on the core as the current FPGA Arcade source is closed in practice atm. It's also that the original source is an 68000 in a hardware description language (HDL), which has then been modified into a 68020 core.

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How big of cache?

The amount of SRAM in a FPGA is quite limited. So maybe a "real" cache should be built with off-chip SRAM. But..

Earlier results show 256 byte instruction- and data cache improves performance to twice that of A4000 68040 @ 25 MHz. Dhrystone 9868, MFlops 10.30 measured with sysinfo.

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1 block ram is about 2K byte. This is quite sufficient as a cache in this case.

Quite enough then

Motorola caches:
68000 - none
68020 - 256 B I-cache
68030 - 256 B
68040 - 4 kB
68060 - 8 kB

Also, the Chameleon's soft 68000 isn't really running at 110 MHz, despite what SysInfo says.  :-)

Run a C compilation 10 times in sequence. That ought to give a sufficient comparision ballpark figure when Sysinfo fails.

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I hope there won't be any huge list of extra instruction ISA that all Amiga now should implement. Rather a few instructions that would give a great boost.

The FPGA capacity is limited.

Bloatwarning ..