FPGA Replay Board

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"Only" 349 USD Weird they didn't exploit the S-ATA capability of the chip..

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What graphics card with enough 3D procession performance, reasonable price, lowest PCI-express lane count, open documentation fits the bill?

More PCI-express lanes = more PCB layout mess and signal integrity issues.
And without documentation = no drivers..

There's another combination few have mentioned. Adding more FPGA:s on a daugtherboard.

Oh btw, FPGA Replay first version big batch hasn't shipped yet.. while we fantasize about the next one

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@digiflip, It's either for an add-on board or the next version. Anyway PCI-e x1 should be doable with a minimal effort (pcb space and routing). Thoe PCI-e x1 graphics cards may be hard to find..

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PCI is nice.. until you going to route signals for it. It needs a lot of signals. That's the benefit of PCI-express. Few wires.. done!

It's like P-ATA vs S-ATA.

Another hack is to serialize the Zorro bus

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The point of serializing any parallell expansion bus is that you can interconnect it with very few wires. As I/O ports on the FPGA are scarce. It also makes it possible to ease some signal skew issues.
A few CPLD or less fancy FPGAs can then parallise the bus off-board. And ZIII is asynchronous so it's less time constrained than other buses.

But for now the only thing I acutally miss on the board is an Ethernet PHY.

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Kedawa, Some people might want to do other things than gaming..

Iggy, I think you miss the technical point. To preserve main FPGA I/O the bus is serialized much like how boundary scan works. Then an external CPLD or FPGA deserialize that to an old-style Zorro II/III bus connector(s).

FPGA-Arcade <-- LVDS serial etc.. --> FPGA <-> Zorro parallell connector

Makes it possible to use any standard already made Zorro device right of the shelf. And it can maybe be applied to the existing FPGA Replay.

The alternative:

FPGA <- Lots of wires -> Zorro connector

Works too but uses up loads of I/O and need lot's of PCB routing to work.

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kedawa, That's why just routing 1-4 I/O ports (out of ~200) to a plain socket will be dirt cheap. Any one wishing to connect an Zorro bus just plugs in an extra slave-FPGA that deserialize.

Adding plain ethernet to the current board would have added $3 for PHY chip and maybe the same amount for the magnetics and plug. The benefit is that you don't have to use sneakernet.

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kedawa, Audio / Video digitizing, networking, most things that interact with the outside world.

Iggy, There is a possibility to (mis)use the existing "user I/O" pads for things like serialized pci/zorro bus or ethernet. The Spartan-3E can pump 333 Mbit/s per I/O asfair. Provided proper impedance matching, differential mode etc.. is used.

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mikej/yaqube, That USB port on the ARM. Is it possible to access it from the virtual Amiga in any constructive way?

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Which computer will be the easiest to revive when the group behind it dissapears. The one with code and schematic or the one without?

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@digiflip, Very likely an additional transceiver chip and PCB impedance matching would have to be done to get DisplayPort. But more people are likely to have an DV I, HDMI or VGA monitor around than a DisplayPort one. KISS in other words.

Anyway it's not a rocket science to convert a DVI signal into DisplayPort externally. Some companies even sell such adapters.

Speaking of this. Is it possible to sneak audio bits into the existing CH7301C-TF-QFP64 and use an DVI-2-HDMI cable and make the TV-set get audio that way without getting into the licensensing hot zone?

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The HDMI  specification says audio is delivered in packets. And wikipedia says it uses 8b/10b encoding for video and 4b/10b for data. And the datasheet for 7301 mentions no control or bypass for the line coding. So it means that chip can't handle it. Unless you with some mathematical wizardy can express 4b/10b data through an 8b/10b encoder.

Other than that either a replacement or external DVI decoder chip chained with an HDMI encoder chip together with the digital audio stream would have to be used to solve this.

A feature solution is to use a rocket port of an Spartan-6 to drive the "DVI" port. A passive cable and som code changes can then turn it into an HDMI source. Without the legal liability I hope.

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If you create a PCB that can do HDMI officially and sell then you risk getting slapped with a 10 000 USD/year fine + 0,04 USD/port. So a solution that can get around that will do. Also keep in mind that the bit timings on these serial links are really tightly packed with PLL locked clocks in parallel. This makes it only possible for FPGAs that have really fast I/O at Gbit/s speed and PLL to go with it. Which limits choices severely.

The chip package 64-LQFP for the 3,3V LVTTL to DVI chip seems handleable. You could try to replace the existing chip with another chip soldered on an adapter PCB. Just watch for wire inductance between the board and the impedance matching, etc.. And don't forget those decoupling capacitances.

A feature solution could be to put the while video converter (LVTTL-DVI) on a little expansion board of it's own. That way it could be inofficially upgraded without anyone being able to claim any responsibility for the base-board PCB creator.

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kedawa, Proberbly if you are prepared to sacrifice a significant part of the video memory pipeline capacity.

Or ask someone to make a DVI-2-memory buffer-2-DVI circuit externally
(could output anything like SCART/CVBS..)

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1-2 days to build one board?

Manual or machine assembly?

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You can connect another FPGA to the expansion port. The base FPGA is wired directly to the expansion port (no FSB).
(So picasso96 etc.. could be implemented)

Asfaik, lest mikej says something else.