FPGA Replay Board

[mikej]

No, but he has confirmed that he will be shipping it any time now and I have no doubt that it will arrive in time to take to the AmiWest 2011 Show with me.

I shipped it yesterday, standard mail but should arrive in 5 days they said.
/MikeJ

[mikej]

I hope the FPGA Arcade can do better with the update. If it's the 68020 enhancements slowing it down, then it would be hard to imagine the Natami N68k achieving 68060 performance.

The cache and prefetch must be disabled in the current core. This is what is hurting performance, not the cpu extensions. The new memory controller and cache system does a lot better.
/MikeJ

[mikej]

1 block ram is about 2K byte. This is quite sufficient as a cache in this case.

/MikeJ

[mikej]

Can I ask people to email me (mikej@fpgaarcade.com) and not use the PM system on this forum.
I am getting throught them, but I need to wait 60s between replies and life is too short for that.
Thanks,
MikeJ

[mikej]

I have received a lot of emails!
I will respond to you all, thanks for being patient.

Hardware assembly and testing is going well.
I really want to roll out the new core with these boards, but there are a few issues remaining.
I'll keep you posted.
/MikeJ

[mikej]

There is a 75R source terminator and bav99 protection diode on the outputs on all card versions.
/Mike

[mikej]

It is possible to configure the logic cells on the fly by configuring them a RAMDs.
Then, the read path works as a 4 input LUT, but you can rewrite the contents from other logic elements.
If you use block rams as decode tables, you can also update these during runtime as well.
/MikeJ

[mikej]

Now that these boards are starting to become available is the source for the AGA core going to be available? Awhile ago it was said that the code would not be released until the Replay boards were available. Will the AGA plus pseudo 68020 core ever show up as FOSS or has the project "gone closed"

Open source. It is not a case of waiting for the boards to be available, a few people have bits of the code already.

/MikeJ

[mikej]

I've added mechanical data and schematics to the website.
Mouse / Keyboard is now working with new softCPU core (picoblaze) to save space and add some flexibility.
It's now easier to change the keymap and you can have two mice (or keyboards) if you fancy.
I'm also trying to support native Atari/Amiga mice in the joystick port.
Best,
MikeJ

[mikej]

I've had to pop back to China for a brief trip, so I won't get any boards shipped out until early November.

On the plus side, I am sourcing parts for the daughter board and working on the new AGA core. I getting some ATX IO shields made, and one board has been sent for EMC testing (CE/FCC etc).

So, it's all coming together ....

/MikeJ

[mikej]

Is EMC testing for CE/FCC compliance really required even for this kind of run?, there's some exempts for components that are not a "full system". Ie circuit boards with components.

"A component made by a supplier for installation into a final product may need CE marking. If the component can be sold commercially and used independently, such as electronic circuit boards, electric motors, or computer disc drives, then CE marking will be required."
/MIkeJ

[mikej]

Yes, that's the plan.
I'm in China this week and I have not been able to answer some emails, I will catch up soon.

I'm trying to get an ATX IO panel made as we discussed. It's going well, the only issue is the cost will work out in the 10-15 Euro region. They need to be laser cut (unless I want 10,000).

How do people feel about the price, is it ok or no interest?
/MikeJ

[mikej]

@MikeJ

I've got a new toy on my desk. It's on loan, but it's a Virtex-7 2000T. This baby would take a full Amiga Chipset + CPU (many times over) and early runs with Synplify + ISE have MiniMig 68k meeting timing easily constrained at 100MHz

Shame it cost over $100k

Very nice Alex. We were trying to get one of those for prototyping, but we brought the largest Virtex-6 we could get instead. Still pretty big
Enjoy... what's compile time like when you get it full? I had to move to a 64 bit Linux box for both Synplify + ISE with 32G of RAM!!
/MikeJ

[mikej]

Hi, I've arrived back from China and board testing continues...
/MikeJ

[mikej]

I have a test rig and a special FPGA build - thats the advantage of having an FPGA

[mikej]

The daughterboard is coming along in placement, and I picked up most of the components for the test board. I'm busy with testing, ce marking and the rear panel at the moment, but nearly there. The website is also taking a lot of time to get up.

I am hoping to get the daughterboard PCB produced on my next trip, early Jan.
/MikeJ