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Author Topic: Zorro 3 Bus Speed  (Read 10480 times)

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Offline tnt23

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Re: Zorro 3 Bus Speed
« on: March 11, 2010, 09:41:49 AM »
Quote from: trekiej;547089
One of the parts of the Asynchronous 68000 bust transfer is the wait states that are added while waiting for /DTACK. /DTACK can be created by a counter that is activated by /AS which is active low Address Strobe. The clock counts for a number of cycles then applies /DTACK.


It could be worth mentioning that /DTACK cannot be generated by a counter or just at will. For reads, /DTACK is asserted by the slave to indicate that the valid data is on the bus. For writes, the /DTACK is again asserted by slave as soon as it has latched the data from the bus. That's why writes from CPU to external memory can be faster then reads.
 

Offline tnt23

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Re: Zorro 3 Bus Speed
« Reply #1 on: March 11, 2010, 08:48:59 PM »
Quote from: trekiej;547230
@ tnt23
What I am refering to is that a memory chip does not or appear to not have that ability but a PIC ( add-on card )does/could. I do not know of any SDRAM chips that have ability, the author did not specify that.

The author shows a counter that counts to a specified amount of time and aserts a /DTACK. The counter is started by /AS. It appears that it does not guarantee that data has made it safely.


Sorry I must have completely missed the design you guys discuss. I thought it was about speeding up Zorro cycles by automating /DTACK generation.