One of the parts of the Asynchronous 68000 bust transfer is the wait states that are added while waiting for /DTACK. /DTACK can be created by a counter that is activated by /AS which is active low Address Strobe. The clock counts for a number of cycles then applies /DTACK.
It could be worth mentioning that /DTACK cannot be generated by a counter or just at will. For reads, /DTACK is asserted by the slave to indicate that the valid data is on the bus. For writes, the /DTACK is again asserted by slave as soon as it has latched the data from the bus. That's why writes from CPU to external memory can be faster then reads.