Individual Computers Announces Clone-A Project

[Dennis]

Great project. I knew he was working on this and now he finally announced it publicly. However, I want to clarify some points made in the article.
First of all: cycle-accurateness; Minimig is in fact a cycle-accurate implementation. Offcourse, Jens has access to a full-blown logic analyzer and an initial development team of 3 people which is an advantage in getting all the "wrinkles" out of the system. But still his project is not the only cycle-accurate one  :-) .
Secondly, in the article UAE was mentioned as one of my primary sources of information. This is not the case. Like I mentioned in my thread here at a.org, my primary source of information is the hardware reference manual with UAE and Winfellow as a "backup".
Lastly, Minimig will be opensource! I have picked up the project again after being occupied with other things (moving to a new house  8-) ) and I am considering releasing the source code much earlier. Then the community will be able to get the last bugs out of Minimig and make their own clone.

Dennis

[Dennis]

Wow, this thread is certainly living up to what I have come to expect of a typical Amiga discussion. How I miss the days of c.s.a.a.  :-(
Anyway, I would like to add a little to the technical side of the disccussion:

@Hans_ / Jen-SS
Minimig is in fact internally split up in an Agnus,Denise,Paula,Gary and even an Amber module(for the scandoubler  :-D ). It was the easiest way to do it as you need to reconstruct the bus-timing in some way in order to be cyle-accurate enough for games/demos. In the Amiga chipset, Denise and Paula are relativily "dumb", that is, they behave just like a bunch of registers and do not have any DMA generators. They just sit and wait to be addressed and supplied with data by Agnus. Information is therefore one-way only; Agnus->Denise/Paula (or more precisely RAM->Denise/Paula). The exception to this is that Paula can reset some pointers in Agnus by asserting the dmal line which in fact also exists in Minimig. Agnus is the most complicated chip and generates all addresses and DMA transfers. Agnus is also the chip that contains the copper and blitter coprocessors.

@Jens
You say the 68HC000 has different execution timings for some instructions than the original 68000. If so, they are not documented anywhere by motorola/freescale. Why I believe you (why would you lie?), I do not believe it would break a lot of games. The Minimig uses an MC68SEC000 which doesn't even have an 'E' clock and still it runs *every* game I tried without patching, in any case enough for a joystick toy.