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Author Topic: FPGA Replay Board  (Read 833161 times)

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Offline alexh

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Re: FPGA Replay Board
« on: January 10, 2011, 09:11:59 AM »
"port" is probably the wrong word. Convert is more appropriate.

Not quite sure why you'd want to. Mixed VHDL and VERILOG works fine in sim & synthesis... I've got 10's of projects here with a mixture.

I guess it must be the developers preference. "Easier to maintain" probably means "Easier for me to read & change". Heh Verilog ain't that bad once you get used to it ;)

As for support / updates for other targets... they could just take the new VHDL versions of the files no? As long as the partitioning / signals don't change (too much) the board specific stuff (usually in separate files) should still interface to the core. After all... MiniMig was only targeted for the MiniMig v1.1 PCB and people added BSP for different boards no problem.
« Last Edit: January 10, 2011, 09:18:53 AM by alexh »
 

Offline alexh

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Re: FPGA Replay Board
« Reply #1 on: January 10, 2011, 07:28:08 PM »
Quote from: freqmax;605396
Verilog is easier and VHDL is cumbersome.
In Verilog is too flexible for it's own good. It is very easy to make accidental syntactical mistakes which actually compile (and thus introduce bugs which are difficult to find) but in VHDL it is practically impossible.
« Last Edit: January 10, 2011, 07:30:23 PM by alexh »
 

Offline alexh

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Re: FPGA Replay Board
« Reply #2 on: January 11, 2011, 12:36:27 AM »
Quote from: mikej;605466
I can create records to pass info around.
ARGH! Please tell me you don't use record types on entity ports? ;)

Next you'll be using arrays of records of enumerated types (guaranteed to feck up almost any FPGA synthesis tool!)
 

Offline alexh

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Re: FPGA Replay Board
« Reply #3 on: January 22, 2011, 10:29:44 AM »
The only practical route would be a hardened FPGA but even then the NRE is pretty big.
 

Offline alexh

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Re: FPGA Replay Board
« Reply #4 on: March 07, 2011, 11:14:12 AM »
Looking forward to it. (BTW: I've got a tray of MC68060RC50 E41J's somewhere if you need one or two)
 

Offline alexh

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Re: FPGA Replay Board
« Reply #5 on: March 10, 2011, 10:46:27 AM »
Amiga Inc. don't own the rights anymore do they? I thought everything was deemed to be the property of Hyperion following the court case?

With the Kickstart ROM replacement work being done there may be no need for a license soon.
 

Offline alexh

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Re: FPGA Replay Board
« Reply #6 on: March 10, 2011, 07:14:53 PM »
Quote from: mongo;620881
OS4 is the only thing Hyperion owns.
Pretty sure that's not true.

Quote
in 30 September 2009, Hyperion was granted an exclusive, perpetual, worldwide right to AmigaOS 3.1
 

Offline alexh

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Re: FPGA Replay Board
« Reply #7 on: March 28, 2011, 04:31:55 PM »
Quote from: billt;625299
Have you checked out Suska?

I've not seen any updates for a while but it will be a good porting opportunity. Moving the BSP (board support package) to FPGA Replay Board will take up the time. It won't be a simple "recompile" but should be possible.

I always wondered why there are so few FPGA projects ported to MiniMig v1.1 PCB?
 

Offline alexh

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Re: FPGA Replay Board
« Reply #8 on: May 14, 2011, 03:13:14 PM »
Quote from: trekiej;637684
@MikeJ
Can your computer take larger FPGAs if upgrading ever becomes an issue?
Will it solder on the same pads?
Unlikely. It would have to be the same model FPGA but a different variant. If mikeJ didn't use the biggest, fastest part (which he probably did) then maybe.
 

Offline alexh

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Re: FPGA Replay Board
« Reply #9 on: May 14, 2011, 06:16:06 PM »
Quote from: Iggy;637789
Does Mike's board have enough gates to emulate a Sharp X68000?
Easily but someone would have to reverse engineer the hardware and write the HDL. I don't think that has been done for that system (yet).

Quote from: Iggy;637789
And what about the '060 daughter board. Would that only work under Amiga emulation or could that be used for X68000 emulation as well?
Yes, but it depends if the X68000 ever had an 060? If the answer is no then there will be no compatible software libraries.
 

Offline alexh

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Re: FPGA Replay Board
« Reply #10 on: May 14, 2011, 08:55:10 PM »
That's probably a no then. I doubt you will be able to use the 68060.

But as there is no X68000 FPGA HDL code for the hardware. The point is a little mute.
 

Offline alexh

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Re: FPGA Replay Board
« Reply #11 on: May 16, 2011, 07:38:19 AM »
I think you're all going a little bonkers. This is FPGAArcade. It is supposed to be a cheap, mass produced hardware emulation platform. Not a replacement PC. Surely if you want addon cards then get a PC/Mac?

Just because a new hardware platform came out the software devs are not going to come back to the Amiga platform. No software devs means no new drivers. No new drivers means no way of using new hardware.

FPGAArcade is surely destined to be a fun hardware emulation platform. Not meant as a replacement computer.
« Last Edit: May 16, 2011, 07:40:43 AM by alexh »
 

Offline alexh

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Re: FPGA Replay Board
« Reply #12 on: May 16, 2011, 09:31:49 PM »
Quote from: billt;638151
Perhaps FPGA Arcade 2 will embrace the idea and take on more of a computer replacement form.

I do hope not. It should be a cost reduction. The price is it's biggest hurdle and once the first wave has paid for the initial NRE then a cost reduction (not necessarily feature reduction) should be next.
 

Offline alexh

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Re: FPGA Replay Board
« Reply #13 on: November 08, 2011, 05:06:28 PM »
@MikeJ

I've got a new toy on my desk. It's on loan, but it's a Virtex-7 2000T. This baby would take a full Amiga Chipset + CPU (many times over) and early runs with Synplify + ISE have MiniMig 68k meeting timing easily constrained at 100MHz

Shame it cost over $100k :)
 

Offline alexh

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Re: FPGA Replay Board
« Reply #14 on: November 08, 2011, 11:23:02 PM »
LX720's are so last year ;)

Something in the realm of 8hrs on our fastest Sandy Bridge Xeon. But it doesn't help that it is partitioned over the two FPGA's in the 2000 using Certify's auto partition. This is all on loan and using minimal constraints.

Our real stuff on LX330 + FX550T is much faster due to manual partitioning at the design level and strict constraints..
« Last Edit: November 08, 2011, 11:36:35 PM by alexh »