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Author Topic: Scandoubler schematics  (Read 14554 times)

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Offline alexh

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Re: Scandoubler schematics
« on: April 08, 2007, 02:31:30 PM »
Hope this ends all nags

http://amigahardware.mariomisic.de/cgi-bin/showhardware_en.cgi?HARDID=1771

A 24-bit video slot scandoubler implemented using 2x A3000 AMBER deinterlacers.

http://www.gb97816.homepage.t-online.de/a2320_aga.htm

All the project files, schematics and CPLD code included

http://www.gb97816.homepage.t-online.de/download/a2320_aga.zip

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countzero wrote:
The averlogic chip seems good, but it says RGB 565 which sounds inadequate for AGA screenmodes.

It's only RGB 16-bit (565) and only gives 16-shades of Red and Blue. Just like the DCE scandoublers Flicker/Scan Magic etc.

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Though there are 8 bit DACs in the spreadsheet so I'm not sure if it actually performs real 8 bit scandoubling.

It doesnt. It only has 16-bit input, but 24-bit output. (It needs that incase you do Y'CbCr to RGB conversion.)
 

Offline alexh

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Re: Scandoubler schematics
« Reply #1 on: April 15, 2007, 04:22:02 PM »
Quote

motorollin wrote:
Does an Amber card work on an A4000, or only an A3000?

The original AMBER A2320 works on all Big-box Amiga's but is limited to 12-bit.

Georg's A2320 AGA works at 12-bit in ECS/OCS Amiga's and 24-bit in AGA Amiga's like the A4000.

I know where I can located 30 Amber chips, but I cannot seem to get Georg interested in making anymore :-(

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motorollin wrote:
Are we saying that there are no chips in existence which can convert the video signals from the Video Slot to VGA?

The problem is that full quality Digital Video is 16-bit in the Y'CbCr colourspace. The modern chips dont have more than 16 input pins on them. They support RGB but only with a 16-bit input (RGB 5:6:5).

If you didnt use an off the shelf chip you'd have to use an FPGA/CPLD which would drastically increase the costs.

You could make a 16-bit scandoubler/flicker fixer for video slots for well under €20 each, but who wants that?
 

Offline alexh

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Re: Scandoubler schematics
« Reply #2 on: April 16, 2007, 12:43:23 AM »
Quote

amiga_3k wrote:
Would it be possible to combine two of those rather low-budget 16-bit chips?

No that is not possible.

The reason you can use two AMBER chips is that they do not have on-chip video DAC's. Their output is 12-bit digital. You can drive an external 3*8-bit video DAC with some bits from one AMBER chip and some bits from the other AMBER chip.

The low cost budget chips have on-chip video DACS.

Their output is analog RGB.

Two analog RGB signals cannot be combined successfully into one RGB analog signal.
 

Offline alexh

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Re: Scandoubler schematics
« Reply #3 on: April 16, 2007, 09:33:28 AM »
Quote

Hmm, combining two low cost chips w/ DAC could also be possible

If they had 24-bit digital RGB output, but they dont.

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if you use a small resistor array, you could actually 'add' the two analog signals (per color)...

It wouldnt work.

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XESS has a Spartan 2 FPGA board with a 32MBx16 ram chip for 88 bucks.

If you were going to do this with an FPGA you wouldnt a) use that FPGA and b) use that board! You'd have to make your own board to make the price sensible.

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eslapion wrote:
Nobody in this thread seems to have considered the design of the original Microway's Flickerfixer.

Where is the design? Provide the schematics and the PLD source code and I'll look at it. Ah, you dont have it do you... never mind then.

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It used ordinary discreet logic chips that costs pennies today.

I think you'll find they had a PLD (programmable logic device) something like a PAL/GAL/MACH etc.
 

Offline alexh

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Re: Scandoubler schematics
« Reply #4 on: April 16, 2007, 05:46:37 PM »
Quote

JimS wrote:
how about an FPGA for logic and a byte-wide fast static RAM for each color..

That is the way most current scan doublers work. However they use a CPLD rather than an FPGA because the amount of logic you need is trivial.

Quote

JimS wrote:
if they make it in a 32-bit package, even better. It would make the board simpler, at the cost of wasting 8 bits/word.

This would make your FPGA/CPLD design more complicated but still feasible.

The problem means that you need write to the RAM at a rate of 27MHz while also reading from the RAM at a rate of 54MHz.

Previous implementations have opted for relatively expensive 3 * 8-bit dual port SRAM to overcome the reading and writing at the same time.

This is wasteful and poor design practice.  

Instead if you make your rams 2x as wide and access two pixels at once you can read and write on alternate cycles.

Writing your own scandoubler is relatively easy. Writing your own flicker fixer is much harder.