Just a little hi-jacking on this thread but a bit related. When I read this thread, some ideas came up. I wonder whether they're anywhere near feasible: (you experts can probably tell :-).
a 4MB fast ram expansion like the old ones which used the cpu socket and then the cpu on top of if. I was thinking of design like the A600 accelerators, with the cpu beneath it.
an "accelerator" with just an 68010 (like Matt_H said; for WHDLoad) and 4MB fastram. A design like this would not change the buswidth because of the almost similar processor. You'd "only" need to stop the onboard 68K processor and take all the signals.
Should I keep on dreaming, or is there any point?
