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Re: NatAmi 68070 design draft
« on: June 24, 2008, 08:09:36 PM »
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AmiBoy wrote:
For anyone who is interested in the NatAmi (like me) Gunnar has released an early draft on the 68070 processor they are hoping to implement in the model after the 060 equipmed Dev Board.

I dont really undrerstand any of it but I thought some of the more technical minded people on here might want to take a look!

http://www.natami.net/knowledge.php?b=4¬e=642


Hmmm, Somewhat ambitious and there seems to be a few flaws in the ideas... Not much detail about branches... does he even know modern branch prediction theory?

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Re: NatAmi 68070 design draft
« Reply #1 on: June 24, 2008, 08:32:10 PM »
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Zac67 wrote:
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The Motorola 68060 CPU was designed that way. Its a CISC decoder in front of a RISC execution pipeline.

Err...

The '060 has no RISC core - this is garbage. RISC starts with Coldfire.

And I'd like a to see an available 5 GHz RISC CPU...



Also I would note that x86 with it's limited addressing modes are easier to "decode" RISC than the 68k could ever be... the whole idea seems riddled with very immature ideas...

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Re: NatAmi 68070 design draft
« Reply #2 on: June 24, 2008, 08:35:53 PM »
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mongo wrote:
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Zac67 wrote:

And I'd like a to see an available 5 GHz RISC CPU...



IBM's Power6 is available at speeds of up to 4.7 GHz.

Is that close enough?


Available from where? Anyway the ALU of the Penitum4 was actually "Doubled Pumped", and that small part of the CPU was actually running at twice the Main Clock speed... so that part of the chip ran past 6Ghz!!!

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Re: NatAmi 68070 design draft
« Reply #3 on: June 24, 2008, 09:09:16 PM »
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alexh wrote:
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Zac67 wrote:
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The Motorola 68060 CPU was designed that way. Its a CISC decoder in front of a RISC execution pipeline.

Err...

The '060 has no RISC core - this is garbage. RISC starts with Coldfire.

He's trying to say that it is a microcoded processor. That is each CISC instruction is in fact a mini program running on a much simpler faster core.

I tried to give some positive feedback, but it is just showing the gulf between his ambitions and his capabilities.


He optimistically suggests 200Mhz speed... Something as complex as a 68k CPU is never going to get even 20Hmz real speed on an FPGA... I'd be surprised if that to be honest...

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Re: NatAmi 68070 design draft
« Reply #4 on: June 24, 2008, 10:32:00 PM »
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HenryCase wrote:

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bloodline wrote:
He optimistically suggests 200Mhz speed... Something as complex as a 68k CPU is never going to get even 20Hmz real speed on an FPGA... I'd be surprised if that to be honest...


Who said it would be on a FPGA? When they are designing it, yes. When they are manufacturing it a structured ASIC is much more likely, so let me ask you this, is 200MHz out of the question on a reasonably priced structured ASIC (like one of the Altera HardCopy series)?


Absolutely no way anyone could ever raise the money to build a 68K ASIC... it would be quite a big and complex chip... There isn't any magic that can turn VHDL into an ASIC... you still need chip designers to load the HDL code into their software and work it into a functional chip...

This is big money...

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Re: NatAmi 68070 design draft
« Reply #5 on: June 24, 2008, 10:46:21 PM »
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HenryCase wrote:

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Zac67 wrote:
There are lots of low cost, high speed available CPUs (well, most of em x86), why not use on of them? While you're at it, add one of the off-the-shelf mobos that don't cost a fortune and are wickedly fast. Obviously you end up where Amithlon started - so I'd rather see a PCIe (or PCI if need be) board sporting an original AGA chipset or a nice vamped up Minimig/Natami/... chipset to get 100% compatibility. Most work (UAE) is already done.


How many f**king times have I got to answer this question. The NatAmi is called such because it is a NATive AMIga. You can have your emulation fun elsewhere, myself (and many others) want beefed up classic hardware, that's what the NatAmi offers. No x86, PPC, ARM, etc... or at least not as the main CPU.


Ok, I have a question... As you will note that Jens at the Breakpoint07 stated... "The Amiga was essentially unchanged for 8 years, If you change anything about the hardware, you create incompatibilities, basically you make a new platform... Why create a new platform... Just buy a Cheap PC?"... While I can see the value in projects like MiniMIG and CloneA, I'm not really sure what NATAMI is really trying to do...

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Re: NatAmi 68070 design draft
« Reply #6 on: June 24, 2008, 10:48:00 PM »
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Plaz wrote:
@ alexh

How's this for my own theory. Dual Coldfire setup. CFv4/266 to start. It's primary job, to run the JIT for backward code compatability. The JIT feeds the second CPU ( CFv2 or perhaps another CFv4 @90-100mhz) that takes the place of the 68K.

I've made this suggestion before, but it didn't get much milage.

Plaz


Probably because your idea defeats the point of a JIT...

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Re: NatAmi 68070 design draft
« Reply #7 on: June 24, 2008, 10:52:04 PM »
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Hans_ wrote:
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Zac67 wrote:
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The Motorola 68060 CPU was designed that way. Its a CISC decoder in front of a RISC execution pipeline.

Err...

The '060 has no RISC core - this is garbage. RISC starts with Coldfire.

And I'd like a to see an available 5 GHz RISC CPU...



Err...

Wrong. The 68040 and 68060 convert CISC instructions to RISC for their internal core in a similar fashion to the way that the x86 does. Externally, it looks like a CISC processor. Coldfire has been called a "variable-length-risc"  processor because they made changes to the instruction set that put it more in-line with RISC architectures (i.e. they don't need the CISC to RISC conversion).

Hans


Zac67 is right... The 060 had two pipelines (Forgive some errors as I'm working from 10 year old memories here), one could only execute the simpler 68K instructions the other could run all of them (and it also had an FP pipe, but the 040 had that too). That way you could get some instruction overlap.
It's not really RISC in the MPIS/SPARC sense, but it borrows a lot of ideas from the RISC research... Coldfire is 68k RISCed...

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Re: NatAmi 68070 design draft
« Reply #8 on: June 24, 2008, 10:58:14 PM »
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Plaz wrote:
@bloodline

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Probably because your idea defeats the point of a JIT...


How so? Just because the function is on a second core? How would a dual or quad core handle JIT?

Plaz


The JIT executes only once per code block (in theory)... Thus why waste an entire second CPU for a task that only occurs relatively infrequently during the life of a program? For example, would you have a CPU and a second CPU for handling Serial port or simply have interrupts on the first CPU to handle the Serial port... it's much cheaper to use interrupts!

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Re: NatAmi 68070 design draft
« Reply #9 on: June 24, 2008, 11:01:11 PM »
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HenryCase wrote:
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bloodline wrote:
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HenryCase wrote:

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bloodline wrote:
He optimistically suggests 200Mhz speed... Something as complex as a 68k CPU is never going to get even 20Hmz real speed on an FPGA... I'd be surprised if that to be honest...


Who said it would be on a FPGA? When they are designing it, yes. When they are manufacturing it a structured ASIC is much more likely, so let me ask you this, is 200MHz out of the question on a reasonably priced structured ASIC (like one of the Altera HardCopy series)?


Absolutely no way anyone could ever raise the money to build a 68K ASIC... it would be quite a big and complex chip... There isn't any magic that can turn VHDL into an ASIC... you still need chip designers to load the HDL code into their software and work it into a functional chip...

This is big money...


Read what I said. I did not say 'ASIC' I said 'structured ASIC'. The Altera HardCopy II may give enough power for a 200MHz 68k family CPU, and costs a fraction of a standard ASIC.


Ok, I've read up about Hardcopy, and it is a Fabing service... it's going to offer better performance than an FPGA... and be cheaper than a full blown ASIC... but it's still big money, money that no one has for some weird slow CPU with no software investment...

And my question about NATAMI?

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Re: NatAmi 68070 design draft
« Reply #10 on: June 24, 2008, 11:08:07 PM »
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Plaz wrote:
@ alexh

I imagined they were trying to do it all in one CPU, and that can only handle so much.

Plaz


The advantage of the JIT over an interpreter is that it doesn't eat massive CPU resources and is well suited to single CPU systems.

The problem I expect is that, the coldfire doesn't actually map well to 68k code... The supervisor mode is totally different for a start... and missing addressing modes add lots of instructions to the translated code... I expect the best they could achieve with current coldfires is something like the 68060 (though one would hope more compatible)...

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Re: NatAmi 68070 design draft
« Reply #11 on: June 24, 2008, 11:20:21 PM »
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Plaz wrote:
@bloodline

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and missing addressing modes add lots of instructions to the translated code


Yes, I did a lot of reading while part of the amiga coldfire project mailing list. That were the dual theory began to start spining in my head as solutions to the less than adaquate supervisor mode.

P.S. Oh and don't forget Ami started out with serveral "co-processors" in the first place.  (I know... that's stretching it)

Plaz


Naja... Two CPU's would be one way to solve the supervisor mode problem... But it's a VERY expensive solution that could be easily sorted out in Software... there are bigger problems... like just how suited the Coldfire actually is to running 68k code... and given the lack of Coldfire boards for the Amiga, I'd say not very...

The Amiga's Coprocessor design was Asymmetric, a specific chip for a specific task... You are suggesting a symmetric design, which is expensive for this...

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Re: NatAmi 68070 design draft
« Reply #12 on: June 24, 2008, 11:29:02 PM »
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HenryCase wrote:
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bloodline wrote:
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HenryCase wrote:

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Zac67 wrote:
There are lots of low cost, high speed available CPUs (well, most of em x86), why not use on of them? While you're at it, add one of the off-the-shelf mobos that don't cost a fortune and are wickedly fast. Obviously you end up where Amithlon started - so I'd rather see a PCIe (or PCI if need be) board sporting an original AGA chipset or a nice vamped up Minimig/Natami/... chipset to get 100% compatibility. Most work (UAE) is already done.


How many f**king times have I got to answer this question. The NatAmi is called such because it is a NATive AMIga. You can have your emulation fun elsewhere, myself (and many others) want beefed up classic hardware, that's what the NatAmi offers. No x86, PPC, ARM, etc... or at least not as the main CPU.


Ok, I have a question... As you will note that Jens at the Breakpoint07 stated... "The Amiga was essentially unchanged for 8 years, If you change anything about the hardware, you create incompatibilities, basically you make a new platform... Why create a new platform... Just buy a Cheap PC?"... While I can see the value in projects like MiniMIG and CloneA, I'm not really sure what NATAMI is really trying to do...


People want the Natami for different reasons, I can only speak about the reasons behind my liking of the Natami project.

One of the best things for me about the Amiga is its architecture. The custom chipsets (OCS/ECS/AGA) working in tandem with the CPU to create a more capable system overall. The PC platform has been moving towards providing the balance in resources we had with the Amiga, but progress on this seems slow (I hope GPGPU tech will take off). The Natami gives us an elegantly designed computer now, because it is based on the elegant design of the Amiga architecture.

Why is this elegance important? Well apart from giving better usage of resources, it is easier to understand from a programming perspective and therefore we should see a high percentage of well written programs on the Natami (less unnecessarily wasteful programs).


NATAMI is anything but elegant... the Amiga was an elegant solution to the computing problems of the mid 80's... Take any generic mainstream PC/Mac/whatever and it will be far more elegant a solution to the modern computing environment than an weird Amiga like kludge...

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That's just from the technical point of view. On the geeky level what's hard about understanding the appeal of a classic Amiga capable of (most) modern computing demands without using any accelerators? That's cool in my book. :-D

I suppose I'm also excited about the Natami because I want to see something close to what the A5000 could have become, so I suppose there's closure reasons too. Of course we'll never know what the A5000 would have been, but the Natami lets us live out our A5000 dream anyway.


A5000 is a bit of a meaningless idea, But I do understand that it would have been nice to see what could have been... but as the great Dave Haynie has pointed out, The future of Amiga development would have moved to off the shelf parts... AAA was OK, in 93... but nothing but a joke by 97...  

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There are probably plenty of other reasons, that's just a list off the top of my head.


I honestly can't see any real advantage...

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Re: NatAmi 68070 design draft
« Reply #13 on: June 24, 2008, 11:49:00 PM »
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HenryCase wrote:
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bloodline wrote:
Quote

HenryCase wrote:
Quote

bloodline wrote:
Quote

HenryCase wrote:

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bloodline wrote:
He optimistically suggests 200Mhz speed... Something as complex as a 68k CPU is never going to get even 20Hmz real speed on an FPGA... I'd be surprised if that to be honest...


Who said it would be on a FPGA? When they are designing it, yes. When they are manufacturing it a structured ASIC is much more likely, so let me ask you this, is 200MHz out of the question on a reasonably priced structured ASIC (like one of the Altera HardCopy series)?


Absolutely no way anyone could ever raise the money to build a 68K ASIC... it would be quite a big and complex chip... There isn't any magic that can turn VHDL into an ASIC... you still need chip designers to load the HDL code into their software and work it into a functional chip...

This is big money...


Read what I said. I did not say 'ASIC' I said 'structured ASIC'. The Altera HardCopy II may give enough power for a 200MHz 68k family CPU, and costs a fraction of a standard ASIC.


Ok, I've read up about Hardcopy, and it is a Fabing service... it's going to offer better performance than an FPGA... and be cheaper than a full blown ASIC... but it's still big money, money that no one has for some weird slow CPU with no software investment...


No software investment? That's why the Natami60 is being released first, to help build up the software base for the Natami.


Have you noticed that we have gone from lots of different CPU architectures, to basically just 2... the x86 and the ARM... Yes, the PPC is clinging on too... I think you would be hard push to justify why you didn't use either the x86 or the ARM in a new design... And I think you would, probably kiss your job as a chip/system designer goodbye if you choose something other than x86, ARM or PPC in your system...

There simply isn't the investment in software to justify building a system built around the 68k...

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As for structured ASIC cost, you may be right that even a structured ASIC may be too much money for us. The Natami team had thought about getting other companies interested in the N68070/SuperAGA chip, so if that happens we'll be back into 200MHz territory easily.


Why would any company be interested in a weird, slow, incompatible and expensive design... where is the value in that? How can you sell that to anyone?

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FPGA performance seems to be progressing at a reasonably good rate, maybe by the time the commercial version of the Natami is ready to be released we'll see cheap FPGAs able to run the N68070/SuperAGA at 200MHz.


By which time, your Average PC will be 20 times more powerful!

I have nothing against NATAMI, but you need to be realistic in what can be achieved!

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Re: NatAmi 68070 design draft
« Reply #14 on: June 25, 2008, 12:02:41 AM »
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HenryCase wrote:
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bloodline wrote:
NATAMI is anything but elegant... the Amiga was an elegant solution to the computing problems of the mid 80's... Take any generic mainstream PC/Mac/whatever and it will be far more elegant a solution to the modern computing environment than an weird Amiga like kludge...


You and I have different interpretations of the word 'elegant' it seems. I am looking from the perspective of less bottlenecks in the system, which the PC/Mac/whatever have. What's the point of all that CPU power if you can't use it to its full potential? Why use the CPU for everything when co-processors can do a better job? As I said PC architecture is moving in the co-processor direction (and has been for a while now) but it's not quite where I'd like it to be yet.


There are more "Co-Processors" in even a 10 year old PC than there ever was in the Amiga...

I would love for you to list these "bottlenecks", that PC's have... I can think of plenty present in the AGA chipset, off the top of my head...

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bloodline wrote:
A5000 is a bit of a meaningless idea, But I do understand that it would have been nice to see what could have been... but as the great Dave Haynie has pointed out, The future of Amiga development would have moved to off the shelf parts... AAA was OK, in 93... but nothing but a joke by 97...


AAA != SuperAGA, but I see where you're going by mentioning it.

Personally I have no issue with the PARISC strategy that was planned for the new Amiga CPU, as at least the 68k functions could have been built in to the new CPU core.


That was NYX, that was not Amiga compatible, it was a totally new architecture... I was meant to replace the Amiga, though Chris Ludwig did mention that AmigaOS would have been ported to it, the main OS would have been WinNT... Had commodore started on NYX earlier and got it going, then it might have push Commodore ahead again like the Amiga did al those years before...

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 However, if Commodore were planning on going with all off the shelf parts then I'm glad they fell on their arse when they did because they clearly didn't see the unique benefits of the Amiga architecture.

Moving to off the shelf parts would have been a lazy attempt to renovate the platform to make up for the years they wasted by not investing highly in R&D.


Yes, that's right... and it was the only realistic solution after they failed to capitalise on the Amiga technology....We should have been phasing the AGA chipset out by 1990... perhaps with something like AAA filling the gap until something like NYX could be brought to market by 1992...

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Using your same Dave Haynie AAA reference 'it would have been revolutionary if released in 1990'. Commodore had 5 years to get from OCS to AAA, which is plenty of time IF they properly invested in R&D.


Yes, that's sad. But that's what happened and the rest of the world moved on!