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Author Topic: Intel CPU Designed For Transitive Binary Translator  (Read 3219 times)

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Re: Intel CPU Designed For Transitive Binary Translator
« on: March 27, 2006, 06:05:15 PM »
Transitive are the guys who designed Rosetta, the PPC->x86 translator in MacOS X, it works rather well... But the PPC and the x86 are quite similar chips, the Itanium is a bit more difficult... code optimised for the PPC will be dog slow on the Itanium.

Anyway since, intel is now looking for someone to buy the Itanium project (that's right they want to get rid of it), I suggest this is just a little token gesture to make the Itanium look a bit more attractive potential buyers.

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Re: Intel CPU Designed For Transitive Binary Translator
« Reply #1 on: March 30, 2006, 12:27:44 PM »
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asian1 wrote:
What will happen if Freescale/IBM/AMCC/Culturecom/Xilinx buy the license from Transitive and create a new PowerPC CPU with support for the binary translator?

Can this move help software developers in porting their applications to PowerPC platform?


Why would they do that?

The days of the Instruction set architecture are over... When the PPC was developed the CPU actually ran the instructions the programmer wrote... now they just get translated down inside the CPU to some weird instruction set that would make little sense to a programmer.

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Re: Intel CPU Designed For Transitive Binary Translator
« Reply #2 on: March 31, 2006, 08:32:31 AM »
Quote

adolescent wrote:
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bloodline wrote:
code optimised for the PPC will be dog slow on the Itanium.


Why is that?  


The EPIC architecture has been shown to be inefficient at emulation of complex traditional OOO general purpose instruction sets.

Quote

Also, since Xeon was mentioned, this could be an extension of the Xeon EM64T line.  


Transistive's software already runs on this architecture, Apple use it. It's not really news.

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Re: Intel CPU Designed For Transitive Binary Translator
« Reply #3 on: April 02, 2006, 11:10:06 AM »
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boing wrote:
>When the PPC was developed the CPU actually ran the
>instructions the programmer wrote... now they just get
>translated down inside the CPU to some weird instruction set
>that would make little sense to a programmer.

Are ye sure you wouldn't like to... rephrase that... laddie?


Hmmm, yeah I could elaborate a little... I meant to say, that the CPU will take the instructions, break them down into a subset of what the Programmers sees. Reschedule them and perform complex register renaming... to the point that the original programmer would have no idea what he was looking at, and certainly wouldn't recognise it as his original program.

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Re: Intel CPU Designed For Transitive Binary Translator
« Reply #4 on: October 30, 2006, 11:05:52 AM »
Ook rocks!!!