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Author Topic: What determines the amount of usable ram on an Accel. Card?  (Read 1720 times)

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Offline xeron

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As already said, cards that max out at 8Mb are usually putting their RAM into the 8Mb window of autoconfig space.

The A1200 motherboard itself has only 24bit addressing (its 68EC020 has only 24 address lines attached to it), and can only "see" 16Mb of memory. This is divided up into chip RAM, custom chip registers, autoconfig space etc.

Cards with more than 8Mb typically have a 32bit address bus (and an address space of 4Gb), or at least more than 24bits.

The lower 24bits are all connected to the A1200 address bus, and so the lower 16Mb of the address space maps to the A1200 address space. Anything above 16Mb can be divided up however the accelerator manufacturer likes.

The limitation on RAM in this case could be due to the number of address lines actually present on the card, the way the memory decode logic is configured, firmware limitations... it could be different for any given card since addresses outside of the A1200s memory range are decided by the card manufacturer.

Interestingly, this is why the A1200 mediator is somewhat crippled. Because it is not tied to any particular accelerator card, it can only use the 24bit addressing of the A1200, and therefore has only an 8Mb window which has to be mapped to one of many 8Mb chunks in the PCI address space. If the mediator had been done as an 060 card with a PCI bus on it (like the G-Rex), they would be able to address PCI cards properly without this limitation. Also, DMA direct to fast ram would have been possible. In short, it would have been much better, but presumably they did it that way because if people can use their existing accelerators, they'd be more likely to buy a mediator.
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