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Author Topic: Coldfire - Binary Compatible  (Read 21580 times)

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Offline Zac67

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Re: Coldfire - Binary Compatible
« on: January 29, 2008, 09:24:03 PM »
It would've been nice for Motorola to have implemented a compatibility option where every changed opcode triggered an exception, so some piece of software could take care of emulation.

Unfortunately we're not in the right timeline for this to have happened... :cry:
 

Offline Zac67

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Re: Coldfire - Binary Compatible
« Reply #1 on: January 30, 2008, 09:27:01 PM »
Quote
alexh wrote:

You do not know what is data and what is instructions (made worse if anything is compressed).


Not entirely true (afair) - looking at the 68k's function control signals (intended for the MMU), the FPGA/glue chip could indeed judge whether code or data is fetched. Er, well, I've got no idea if a ColdFire has anything like FC signals...

However, this would effectively rule out any (code) caching since that would bypass any possibility to manipulate the code stream before it gets executed. Furthermore, it would slow down the memory access, which most of the time is a bottleneck anyway. No way anyone wants to go...
 

Offline Zac67

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Re: Coldfire - Binary Compatible
« Reply #2 on: January 31, 2008, 07:45:48 AM »
The only solution to this problem - as has been said months ago - is building a patch database where the required patches for all applications are collected over time to be applied to the binaries when needed (a bit like WHDload). This might have been feasable with the user base in '94 and today's Internet, but it's impossible today.
 

Offline Zac67

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Re: Coldfire - Binary Compatible
« Reply #3 on: February 03, 2008, 11:42:20 AM »
IMHO, if you need to emulate the 68k programming model in the first place, the only point left is speed. There's no point in starting with a comparatively slow ColdFire in the first place. The bus is hard to adapt as well, so no advantage gained there either.

From the speed POV, you're left with PPC and x86 - with x86 being highly available in all speed grades and form factors. Rather than designing a new accelerator board, it'd be much easier (well, somewhat) to redesign the chipset (when you're hooked to it) since this is already worked on. Put all this as an FPGA on a PCI(x) board, use an off-the-shelf x86 mobo and you're set.

Actually there isn't really too much point left in dragging the chipset behind either - if you drop that as well, you're left with the OS. Port it to the platform of your choice - et voilá - that's where AROS comes into play.

It all depends on what you really want to achieve:
- save your old hardware from dying (expensive)
- modernize your system while keeping old software (=> emulation)
- regain a good price/performance relation (=> OS porting)

Everything else is :horse: