Actually it's more a bug of the CPU card - they shouldn't try to initialize a burst transfer if they can't manage to do so.
Ramsey can only do '030 bursts which (I was told) are totally different from '040 bursts... Using a fast page ZIP in the first bank will disable burst mode completely and (if that is the cause) will solve the problem.
Followup: found some of my old notes - the Ramsey register in question is $DE0003:
Bit 0: page mode
Bit 1: burst mode
Bit 2: burst wrapping
Bit 3: RAM size (0=1M, 1=4M)
Bit 4: RAM width (0=1 bit, 1=4 bit) //whoah - never knew 1 bit was possible...
Bits 5-6: refresh rate
linkSo all you have to do is to turn off bit 1 (you might have to be in supervisor mode to access Ramsey) and that'll disable burst mode with SC RAMs - voilá. ;-)