The biggest problem with this idea is that none of these processors use the same bus interface so you'd need interface logic dedicated to each processor the board supports. This wouldn't be too much of a problem if you were planning on supporting only old processors (like the 68000) as they tend to have relatively simple busses. With modern processors it's much messier (especially now that some chips have onboard memory controllers).
This is not to say that it's impossible, just a real pain in the butt.
