Maybe the SH-4 isn't perfect, but UAE is mostly CPU intensive... with careful optimiseation UAE could easilly get A500 speeds... though I'm not sure about sound quality... THat is why I suggest putting two smaller ARM cores on to on chips that would allow much better control of the timing issues and allow at least two parts of the emualtion to run at once... which is closer to the real thing (tm).
Unless you sacrificed a great deal of accuracy, A500 emulation will never be full speed on an SH-4. One of the faster ARM chips could probably pull it off (a 400MHz XScale could certainly do it), but in a toy with an end price of $25 dollars I don't think it will work out economically. You have to assume at least a 100% markup between the distributor and the retailer so that leaves you with no more than $12.50 to cover manufacturing, royalties for the games on thing, and whatever profit you want to come away with.
These little retrogames toys are made in the cheapest way possible. The system on a chip doesn't even live in a proper IC, just a silicon wafer directly attached to the PCB and covered with a blob of epoxy. This is probably the only way to get the per-unit cost down to something reasonable, but it does mean someone would have to spend the upfront cost to design an A500 on a chip. There are companies that will take an FPGA based design in Verilog and produce schematics you can take to a fab for a reasonable price.
I don't but if you read Dave Haynies post, this says that it's not much. And if you were recreating the functionality of such chips now you could probably get the whole lot on to one FPGA.
Oh, I'm sure you could fit the whole thing on an FPGA. These days they've got FPGAs that have millions of gates and considering that the A1000 was prototyped on a few breadboards using discrete logic chips the OCS chipset has to have considerably fewer gates than that. I was just wondering if anyone had a numerical estimate so I could guess how big of an FPGA I would need to give it a try. At some point I'd like to try and recreate the OCS chipset in an FPGA or a few CPLDs just as a hobby project (I have a way to go in digital logic before I can try that, but a guy can dream).
