to run quake3 was missing from my post. Fixed it.
You still argue that it's a HW issue?
Also I still don't understand how memory allocation speed affects the memory access speed.
I suppose if I had an OS4 and MOS box then I could see what you mean.
As for memory allocation speed, when initiating any transfer, is this step not required? I don't know the size of the transfers in question but let's say they were done in 1k chunks. The memory must be allocated for the transfer to begin. If the tests included those requests then they would be skewed towards the OS with the most efficient allocator.
The smaller the chunk, the more exagerated the results of the the transfer.
On a lower level, was the OS4 transfer done in full DDR2 burst mode? If not you wont' see speeds over DDR1. There's alot of variables here.
Is the FPGA in the SAM460 the memory interface? It may not be operating in burst mode yet.
All in all, I think you are prematurely bashing the hardware as an excuse to clandestinely bash the OS it's running on. So, I repeat: port to SAM460 then tell us how bad it is...