Hello Garret,
What you ask for is the holy grail of the EDA (electronic design automation) industry. This problem is very complicated because code written in a higher level programming language is a number of commands executed serially, hardware is a number of block working parallel. To get more information about development in this industry you can surf to
EETimes. One of the last articles in the EDA section was this:
C based design methodology accelerates ASIC/FPGA design cyclesHave fun,
Staf.