RAMcolumn/row configurations supported by the memory controller:
Sbk Raddr Caddr MB
1, 11, 8, 8,
1, 11, 9, 16,
1, 11, 10, 32,
2, 12, 8, 32,
2, 12, 9, 64,
2, 12, 10, 128,
2, 12, 11, 256,
2, 13, 11, 512,
2, 13, 9, 128,
2, 13, 10, 256,
Sbk is the number of banks, RAddr and CAddr are row and column address
bits, and MB is the resulting size of the module.
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(I am quoting the highest authority in this information; Hans-Joerg himself!)
