A500 + DiagROM = all RAM bad

[Castellen]

There are a few different possible causes.  Could be that both DRAMs U18 and U19 have failed, which can sometimes happen.  Or as mentioned above, half of the data bus bridge has a problem; likely U12 or U13 missing one of the control signals.  Might be a defective U12 or U13, which is less likely.

Would be easy to see what's going on if you had an oscilloscope, so without one my suggested approach would be:

1. Carefully inspect the PCB for any physical damage, scratched tracks, etc.

2. Inspect the IC sockets for contamination or damage of any contacts, especially U2 and U5.  If in doubt, replace the socket.

3. Replace U18 only, run DiagROM again and see if data bits 8-11 are now working, if so, replace U19 as well and that should fix it.

4. Else you could try replacing octal buffer ICs U12 and U13.

5. If that doesn't fix it, you likely have a connection problem to U12/U13.  Which would be a few seconds to find with an ocilloscope, or a few hours to find with a continuity tester.  Though you'll probably struggle to correctly measure an open circuit if it's caused by a contact issue in the PLCC84 socket (U2).  So you could try replacing the U2 socket if you don't find an obvious connection/continuity problem.

[Castellen]

For troubleshooting, I ask...

Reading memory from right to left

Write: $00000000  00000000000000000000000000000000
Read: $FF00FF00  11111111000000001111111100000000  FAILED

Each (2) 4256 chips = (1) 256KB chip memory bank. Does something like this point to one the 4256 working while the other is failing? I thought I heard/saw/read something about memory goes to the start of (2) chip banks then to the second half of the chip bank. The start of the chip memory bank is U16 + U17.

chip bank 1 = U16+U18
chip bank 2 = U17+U19

Not quite.  Each DRAM is 4-bits wide, and the memory in the A500 is 16-bits wide total.  So you need 4 x 4-bit DRAMs for a memory width of 16-bits.  i.e. It uses all four DRAMs to form the single 512KB block of memory.

The 68000 can deal with 32-bit numbers, however the memory is physically 16-bits wide in the A500.  In order to store a 32-bit long word, it has to use two consecutive 16-bit words in memory.

That's why in DiagROM you see the same error in the 32-bit test pattern twice.  It writes the 32-bit long word, which spans two words in the 16-bit memory, then reads back what was written to the same two words.  When there are any bad DRAMs, you see the same defective bits mirrored in both the top and bottom half of the 32-bit long word.

As for which DRAM does which nibble (group of 4 bits), you just need to look at the A500 schematic.

When you've populated the second lot of DRAMs, it's added a second block of 512KB, the 8 devices forming a single 1MB memory block.