A500 Startup Problems with A501 memory card

[Castellen]

The one issue that remains is that on startup, the amiga hangs on a WHITE screen.  Occasionally(say, 1 in 5 cold starts), the amiga boots fine, recognizes the new memory card, and all is kosher.

If I temporarily disable the memory card, boot, re-enable the card, use the "addmem" command, then everything is also kosher.

If this problem is only happening during cold boot as you say, it may be an issue with startup time of the SRAM.  All of these devices have a specified time between when power is first applied and the device is ready for use.  See what the SRAM datasheet says.  It may be that the Amiga chip memory write/read tests are in progress just as the SRAM is entering a ready to use state.

Shouldn't be too hard to test the theory; just make a small RC type of circuit that holds the reset line low for 600ms or so at power on.  If required you could build this into your final design as I'm fairly sure the _RST line is available at the A500 expansion connector.  Note that you'll need to use an open collector drive onto the reset line.  e.g. A 555 timer IC would be ideal.

I'm aware of the heavy duty factory shielding and other DIY attempts that have required such shielding to function --- but it's my firm belief that a (non-RF) design that requires shielding to operate normally hasn't been designed very well.

The type of shielding you describe is to minimise radiated emissions.  You're right that it shouldn't affect your design.  Keep in mind that every circuit operating at a radio frequency (e.g. microprocessor based) will emit some degree of the fundamental operating frequency and its harmonics as radiated emissions from PCB tracks, ICs themselves and as conducted emissions through connecting cables.  I'm an RF/electronics design engineer and do this kind of stuff for a living.

To elaborate, at very fast clock speeds the shielding on a circuit or a cable can be required for it to operate because at higher radio frequencies a section of copper track or wire changes from a simple conductor into a complex transmission line where impedance, lengths and termination suddenly become critical.  Often a section of shielding can play a role in the impedance of a transmission line, a typical example would be in the construction of coaxial cable or even a high speed USB cable.  It's often more to do with the laws of physics than necessarily being a bad design.

Sensitive circuits can require shielding to reduce noise/interference from other emissions such as nearby radio transmissions, EM fields from transformers and motors, etc.

But at the lower speeds the A500 is operating at, of course this won't be an issue for you.  Obviously the metal shielding used on these computers were to satisfy EMC standards for radiated emissions as opposed to having any affect on the circuit operation.

[Castellen]

It was a good idea to check the SRAM datasheet[1] for a startup time, but heck if I can find one on there.  It looks like stable voltage on OE(grounded permanently) and CE might be the deciding factor?

I checked the datasheet for the actual SHARP chips used in the amiga, and they are 500us + 8 refresh cycles.

Surely the SRAM would be faster than this?

I don't see the power up time mentioned on that datasheet either.  While you'd certainly expect the SRAM to power up in plenty of time, it's bad practice to make bold assumptions.  I've seen some  modern devices that take an eternity to become usable after power up in comparison to what you'd normally expect.

Another potential problem is the +5V supply line to the SRAM taking a while to stabilise.  Most of these modern devices have in-built brownout detection where the device is internally held in a reset state until the supply is fully stable.  Use a digital storage scope on the V+ supply pin of the SRAM to look at the rise time and check for any significant overshoot or ringing.  The problem with using logic analysers is that they usually won't show this level of detail, unless they include mixed signal (analogue) capability.

How's this for a quick idea that won't cost you any time or money:
1. Find any convenient access to the A500 reset line (_RST) and manually short it to ground using a pair of tweesers, this is 100% safe to do as the line is not actively driven high at any time.
2. Power on the A500 normally.
3. After a second or so, remove the tweesers and see if the machine always boots reliably or you still get the white screen thing.

If that works, there's probably an issue with supply settling time or device power up durations.  If it makes no difference, ignore my suggestions.

Do you know if kickstart has disabled the rom at $0 when it dies?
 
You might want to patch a copy of kickstart to output more of an indication where it's up to.

To answer your other question, this poster is talking about the fact that soon after power up, the system changes the ROM address (location) in the system memory map.  At power on it's located at 0x000000, then early on during startup it gets moved to 0xF00000 - if I recall correctly.  Or is it 0xF80000?  Whatever.  When this happens, the Overlay line (OVL) which is an output from CIA U7 (in the A500) pin 2 which goes either high or low (can't remember which direction), which then connects to the system address decoder (Gary) to change the _ROMEN address generation.  This happens before the chip memory boundary tests are done, so it's a good suggestion to see if your white screen issues are before or after this event.

Failing that, it might be worthwhile finding out exactly where in the A500 ROM the screen is set to white.  I think it may be when exec is started (don't quote me on that), which is after the chip memory tests are complete.  Keep in mind that the chip memory test is NOT a thorough test, it only writes a longword every 16kB and checks it can be read back and isn't mirrored at address 0x000000.

I have a description of the ROM boot procedure detail here, see the bottom of the page.

Yes, you'd have to change the ROM to make it give you any better detail.  If you're able to configure your logic analyser to trigger on specific address words, I can send you an A4000 ROM image which has this level of debugging.  Normally it's used with some special hardware I developed which captures special debugging data sent out on the address bus, but you may be able to do bits of this with your logic analyser.  While it would fail at some point because the A4000 ROM won't run properly on A500 hardware, all of the initial stuff should work.  But again that requires you to be able to write a ROM image into something and boot from that, so probably not so helpful.

[Castellen]

If I place all address leads back on the jumpers, and place the ground connection back where I had it, it boots nearly 100% of the time.

P.S. I've read about logic analyzer probes loading the circuit, and it affecting by increasing or slowing the rise times. I'm using mostly 74ACT logic here, but the amiga is primarily 74LS based.  I swear I've read that the rise times can be too fast, and older logic could have problems with it.

Given that clue it certainly points more towards a rise time issue than it does a startup timing issue.  Though that doesn't fully explain why it's only a problem during power up.  Or it could be a combination of both of these issues.

Have you had a look at any of the data or address lines using a high speed (100MHz+) digital storage scope?  Preferably connecting with a high impedance differental probe so that connecting the probe doesn't hide the issue you're looking for.  That'll provide a much clearer answer of what's going on.

Could you post a link to your design schematic?

In comparison, you'll see the A501 has 27 Ohm series resistors to slow edge rates which limits overshoot and ringing.  Does your design include something similar?

Connecting the analyser probes will add a small parallel resistance and will of course have an effect on edge rates.