Super Kickstart

[Castellen]

The other ROM positions (U182, U183) are for ICs that have a different pinout such as the 27C220 and 27C2048.

The standard positions U180, U181 are for pinouts to suit 27C100, 27C200, etc.

You can't have two types of ROMs fitted at once, although if you were to disconnect _ROMEN to each ROM pair and fit a toggle switch so that only one pair can be active at once, then it would be possible to switch between the two.  You'd need to add pullup resistors on the ROM _OE lines for when nothing is connected.

But it's a lot nicer use to use a ROM switcher module or BlizKick instead of chopping the hardware around.

[Castellen]

Are you sure about the type of roms the 2 sockets can use? I know the 27c220,2048 etc can replace the rom tower(which used 27c200,400 etc) on the rev 7 boards direct(u180,181) eliminating it ,but i seem to recall i tried the 27c220/2048 etc in the u182,u183 positions and it did not work. My memory may be failing me but those sockets don't seem to work for any rom/eprom pinouts i found.

Have you actually used those sockets?

All of my hardware development work was based on the U180, U181 positions so I've not personally used the U182, U183 positions.

I've seen various examples of A3000s with 27C220 ROMs in U182, U183 so I would assume they work on at least some PCB revisions.

If you're having issues, then compare the pin detail from the EPROM datasheet to what's presented on the A3000 hardware.

A potential trap for hardware newbies is that the high order address line(s) such as A17 (pin 1) is floating on certain revisions of the A3000D main board, including rev 8.9 and possibly earlier ones.  Was fixed (tied to ground) in rev 9/03.

The result is that if you're using EPROMs larger than 256kB x 16 (4Mbit) then the high order address line floats and may cause unpredictable results.  I know some memory devices refuse to work correctly at all if any of the address lines are floating, even if the data image is mirrored to both halves of the address range.

[Castellen]

I purchased a pair of 3.1 ROM's which were in fact 27C400s. I also have the rev. 8.9 mobo which leaves pin 1 of the ROMs floating. I Never had a bit of trouble with them even when the mobo was over-clocked and ROM timing was set for the fastest speed. They had a mirror image burned into the upper and lower 256KB of each ROM so they would have worked with pin 1 to GND or VCC although left floating is usually resolved as a logical high by the internal address buffers.

Of course it depends on the device being used.  Older UV EPROMs tend to be quite forgiving in terms of floating address lines.  As you say, some of these devices have internal pullups on the address lines so you can get away with leaving these inputs floating.  But again, that can vary between manufacturers.

Many modern flash based devices aren't as tolerant.  I found some of these were totally unreadable over the entire address range when a high order address line was floating.  That's how I first came across the floating address lines in the earlier A3000s.