680x0 behaviour question

[FrenchShark]

Hello,

I am trying to make a 680x0 emulation in VHDL.
I have a question concerning the shift operation:
- Freescale documentation says : the shift value is modulo 64.
- The 68k emulator I am using (EASy68k) uses a shift value modulo 32.

Can someone execute the following code under AsmOne (with a real Amiga !)? :

moveq  #39,D0
move.l #$000000FF,D1
lsl.b  D0,D1
rts

According to Freescale, D1 must contain $00000000.

Regards,

Frederic

[FrenchShark]

@ChaosLord

Thank you, it looks like I found a bug in EASy68k :-)

@Piru

I did not want to install UAE just for few lines of ASM testing.

Anyway, thank you guys.
I can finish the ALU shifter now (the hardest part is actually the V flag management).

Frederic

[FrenchShark]

I am the lucky owner of a Stratix II board :-).

I want to create a risc CPU with the ALU of a 68000.
If I do it well, I should achieve 100+ MHz operation, with the emulation layer this should translate to 10-20 MIPS.

[FrenchShark]

Hello,

I have a second question, does the following code set the X, N and C flags ?

        MOVEQ   #9,D0
        MOVE.L  #$FF,D1
        ASR.B   D0,D1
        RTS

The emulator just set the N flag.

[FrenchShark]

Thank you!

another bug in EASy68k :-)