Minimig PCB run - interest thread

[FrenchShark]

It could be possible with a 27 MHz XTAL.

See the page:

http://www.opencircuits.com/Minimig_NTSC

Here is the computation:

27,000,000 / 429 x 455 = 28,636,363 (NTSC clock, 0 ppm)
27,000,000 / 432 x 454 = 28,375,000 (PAL clock, 6 ppm)

The DCM from the Spartan 3 accepts only coefficients from 1 to 32 :-(.

The Cyclone III accepts coefficients from 1 to 512.

The NTSC clock generation can be simplified to:
27,000,000 / 33 * 35 -> would fit into 2 cascaded DCMs.

We are less lucky with the PAL clock generation:
27,000,000 / 216 * 227 -> 227 is a prime number !

[FrenchShark]

freqmax wrote:
Could you explain your equations a little bit more?
27/4.433619 = 6.0898331 ie divide by 6 ..?

28,636,363 Hz and 28,375,160 Hz are the base frequencies of an NTSC and PAL Amiga respectively.
As discussed before, they can be generated with a single 27 MHz crystal.

Why did Commodore used these frequencies ? Because :
- the PAL color clock is 5/32 of 28.375160 MHz (i.e. 4.433619 MHz)
- the NTSC color clock is 1/8 of 28.636363 MHz (i.e. 3.579545 MHz)
-> That way, you have got a video compatible computer.

Dennis used a 4.433619 MHz crystal  to generate the 28.375160 MHz and all the sub-multiples.
I guess he did that because the 28.375160 MHz crystal was not available.

[FrenchShark]

freqmax wrote:
The datasheet for MC68040 I looked at says Vcc 0V-7V. So I guess 3.3V operation is ok.

There is a specific 3.3V version of the 68040 it is called 68040V.
If you want to save some pins on your FPGA, you can design the board like on a real Amiga : the Chip-RAM bus and the Fast-RAM bus are separated by buffers. Agnus takes care of the Output Enable of these buffers.

[FrenchShark]

A lot of people are asking for 020+ CPU and AGA.
I just had a crazy idea : for the Minimig v1.2, let's put a real 64 pin DIL 68000 in a socket.
Any A500 accelerator board that plugs into the 68000 socket can be used !!
For the 3.3V <-> 5V translation, we can use Pericom chips like the PI5C3384.
It might be interresting to put also 512KB or 1024KB of flash directly hooked up on the 68000 bus with the Flash's chip select being managed by the FPGA. That will free up the full 2MB of SRAM for Chip RAM use only.

The AGA chip RAM is 4x faster than the ECS/OCS chip RAM (32-bit access with double CAS). The ECS/OCS chip RAM runs at 3.5 MHz or 280ns access time. If you have a 16-bit SRAM with an access time of 70ns or less, you can be as fast as the AGA chip RAM.