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Author Topic: PPC vs x86 speed/performance comparions?  (Read 11182 times)

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Offline Agafaster

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Re: PPC vs x86 speed/performance comparions?
« on: February 11, 2008, 02:20:42 PM »
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Piru wrote:
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Is there any chance of the sparc (any version of it) running Amiga OS

no


UAE !  ;-)
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Offline Agafaster

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Re: PPC vs x86 speed/performance comparions?
« Reply #1 on: February 11, 2008, 02:23:11 PM »
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JJ wrote:
You cant even compare different genrations of the same  processor family by MHZ.  MHZ is the most pointless indicator of chip performace of chips thers is. Unless you are comparing chips of eexactly the same architecture.  Obivously 50mhz 030 is faster than a 25mhz 030.  But you cant compare it against anything else by the MHZ


Although saying that, I do recall a 'rule of thumb' that a PPC of a certain clock could perform around 2x the equivalently clocked contemporary Pentium. I guess that'd be the PIII cf. the G3 though...
\\"New Bruce here will be teaching Machiavelli, Bentham, Locke, Hobbes, Sutcliffe, Bradman, Lindwall, Miller, Hassett and Benaud.\\"
\\"Those are all cricketers, Bruce !\\"
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Offline Agafaster

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Re: PPC vs x86 speed/performance comparions?
« Reply #2 on: February 11, 2008, 03:32:48 PM »
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downix wrote:
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bloodline wrote:
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Agafaster wrote:
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JJ wrote:
You cant even compare different genrations of the same  processor family by MHZ.  MHZ is the most pointless indicator of chip performace of chips thers is. Unless you are comparing chips of eexactly the same architecture.  Obivously 50mhz 030 is faster than a 25mhz 030.  But you cant compare it against anything else by the MHZ


Although saying that, I do recall a 'rule of thumb' that a PPC of a certain clock could perform around 2x the equivalently clocked contemporary Pentium. I guess that'd be the PIII cf. the G3 though...



No, that would be against the Pentium4 which had very long (22 stage?) pipelines, so that very high clock speeds could be achieved, at the expense of work that could be done per clock cycle. It was a strategy based on the idea that transistor switching speeds would increase dramatically in a short space of time... this did not happen and they have currently topped out at around ~3Ghz.

AMD and Motorola opted for shorter pipelines, which resulted in lower clock speeds but more work gets done per cycle... With the Core2 architecture Intel have adopted the same approach, and brought with them all the good stuff from the P4 (ie great branch predictors and macroop fusion, etc)... (and borrowed all the good ideas of the Athlon64 and the PIII too)...


With the irony being that Intel's next-gen chips are going back to the classic P4 methodology...


...but maybe for different reasons - other than the cynical attempt to Ramp up the Clock speed for Marketing to Dullards(tm) purposes
\\"New Bruce here will be teaching Machiavelli, Bentham, Locke, Hobbes, Sutcliffe, Bradman, Lindwall, Miller, Hassett and Benaud.\\"
\\"Those are all cricketers, Bruce !\\"
A1XE G3/800MHz Radeon 7000 512MB
A1200 030/25MHz 8MB