VHDL and Xilinx Software Question.

[trekiej]

The tutorial in the book show ISE 6.1 software. During Compilation/Synthesis( probably not accurate ) the pins where set by software.
Is it possible to state how I want the pins to connect to my code? During schematic capture it seems to be possible.
 
I hope that came out right.

[trekiej]

Thanks a lot to both of you.
I have a Xilinx X board with a Cool Runner II chip.
It has ISE9.1 if I remember correctly.
This will help me for sure.
Cheers.

[trekiej]

I will keep that in mind.
I will put 6.1 and I believe 7.1 on a Win98 machine.
The others will be on an XP,Vista machine.

Is there any time I will need the software to make pin connections for me? I bet power,clock,ground,and programming will be out of bounds. :-D

I searched Google and it was a bit helpful.
I can see why someone would want Open Source Software for CPLD,and FPGA.
PortablE looks to be a good programming language for FPGA's.