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Author Topic: How L1 and L2 caches work  (Read 3961 times)

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Offline TeamBlackFox

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Re: How L1 and L2 caches work
« on: September 12, 2014, 07:01:51 PM »
PA-RISC proved that large L1 cache doesn't have to be slow, but it did have heat and power consumption issues, especially the last few models in 2006-`08. From what I know, the PA-RISC architecture had basically two L1 caches, vs L1 and L2. However, compared to Alpha, PA-RISC was a terrible performer in general calculations, but it did kick x86's arse well into the NetBurst era. It would have been interesting to see what the computing industry would be today if Itanium had never been developed.
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