The CS8900 series (the chip used on the RRNet) doesn't reliably generate interrupts in 8-bit mode (per the datasheets), so it's up to the CPU to push the data around. (Those lines aren't wired on the RRNet, regardless.) Assuming the CPU could keep up with the traffic, a chip that does generate interrupts might produce suitable results. In either case, though, the card would be functional, and the higher-level protocols were designed with dropped frames in mind.
So really, the hardware isn't really the problem. It's the stack. AmiTCP and its derivatives have pretty hefty requirements, and a new, lightweight stack would need its own bsdsocket.library implementation to be useful to existing software. Open source applications could be modified to fit.