What determines the amount of usable ram on an Accel. Card?

[Kronos]

A card that stops at 8MB might in the most cases put it's RAM in Z2-address-space, but thats true for all of them.

It's really a matter of how many address-lines are routed to the RAM-sockects, which is never the full 32, unless you've heard of a 4GB-PS/2-SIMM.

The numeber of lines is often defined by the RAM-standard of the time.

For example, all CybersStorms can only take 32MB per slot, while the BlizzardPPc will take 128MB.

Just because there were no modules bigger than 32MB defined at that time.

A (old) turbo design for 1MBit DRAM-chips might go to 4 maybe 8MB, adding more was impossible due to space restrictions.

A slightly never one might use 4MBit chips, costum SIMMs ZIPs... and will pack more onto the PCB.

[Kronos]

@Lemmink

Every card containing FAST-MEM needs to generate it's own refesh-signal (which is what a memory controller for DRAm does), it must also do it's own address-decoding.

Only CHIP and SLOW-MEM is refreshed by Agnus.

Cards above 24Bit aren't autocifiged by the HW, but must go the route via expansion to add their RAM to exec's list.

Either that or by a special "add-mem" command.