Blizzard PPC scsi transfer speeds

[patrik]

Wierd, it sounds just like your Mask would be the stock "Zorro2 compatible" 0xFFFFFF and thus forcing your system to shove the data through chipram and using the cpu to copy it to/from chipram to the correct location.

Not that this should make any difference, but try setting those values to the defaults for a 32-bit system - Mask=0x7FFFFFFF and MaxTransfer=0xFFFFFF. Do this for each one of your partitions.


/Patrik

[patrik]

@Boot_WB:

No it is not wrong, but you have a wierd issue which doesn't seem logical at all and  then it is often good to also try settings that should not matter. So, try setting the MaxTransfer=0xFFFFFF (six F).

@Framiga:

You should only clear the least significant Mask bits if the controller cant write/read data to/from say 16-bit aligned or 8-bit aligned addresses. So if you set the mask 0xFFFFFFFC, then it will only be able to read/write data to/from 32-bit aligned addresses and if it is fed a buffer on say a 8-bit boundary, it will transfer the data through chipmem and between chipmem and fastmem using the cpu, which will be very slow.

Neither the BPPC or CSPPC controller has any such limitations and should have the mask set to 0x7FFFFFFF or 0xFFFFFFFF.

Compare the results for the WORD and BYTE-aligned parts of these tests:
Mask 0xFFFFFFFC
Mask 0xFFFFFFFE
Mask 0xFFFFFFFF


/Patrik