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Amiga computer related discussion => Amiga Hardware Issues and discussion => Topic started by: RetroNinja on September 30, 2023, 06:39:01 AM
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Hello,
I'm looking for some troubleshooting help. This is the output of an A500 (6A mobo) when I try to power it up. The screen goes straight to GREEN. If I install a DiagROM it flashes RED + GREEN then shows some horizontal stripes. This is just the onboard 512KB, no trapdoor memory installed.
I have swapped in a different Fat Agnus and Gary, referencing some other threads, no change at all. Some tables say GREEN = memory. I'm hesitant to believe all memory is bad. Also all bad memory is read as HIGH (1). I don't see any memory errors as LOW (0). One semi-similar thread said the U34 74F244N may be suspect. I'm likely to believe some logic chip is bad versus all RAM. I'm fine replacing all of the memory, I'd just prefer not to do it needlessly.
The dump below has a large section removed. If it is helpful to see it just say so and I will upload. But really, it's just a repeating pattern.
No, I don't have a data probe or oscilloscope.
Thanks!
=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2023.09.29 22:19:21 =~=~=~=~=~=~=~=~=~=~=~=
Amiga DiagROM V1.3 BETA - 21-Feb-22 - By John (Chucky/The Gang) Hertell
- Parallel Code $ff - Start of ROM, CPU Seems somewhat alive
- Testing ROM Address-access
OK
Testing if serial loopbackadapter is installed: <> NOT DETECTED
Checking status of mousebuttons at power-on:
Set all Interrupt enablebits (INTENA $dff09a) to Disabled: Done
Set all Interrupt requestbits (INTREQ $dff09c) to Disabled: Done
Set all DMA enablebits (DMACON $dff096) to Disabled: Done
Testing if OVL is working: OK
- Parallel Code $fe - Test UDS/LDS line
- Test of writing word $AAAA to $400 FAILED
- Test of writing word $00AA to $400 FAILED
- Test of writing word $AA00 to $400 FAILED
- Test of writing word $0000 to $400 FAILED
- Test of writing byte (even) $AA to $400 OK
- Test of writing byte (odd) $AA to $401 OK
- Parallel Code $fd - Start of chipmemdetection
Addr $00000400
Write: $AAAAAAAA 10101010101010101010101010101010
Read: $FFAAFFAA 11111111101010101111111110101010 FAILED
Write: $55555555 01010101010101010101010101010101
Read: $FF55FF55 11111111010101011111111101010101 FAILED
Write: $F0F0F0F0 11110000111100001111000011110000
Read: $FFF0FFF0 11111111111100001111111111110000 FAILED
Write: $0F0F0F0F 00001111000011110000111100001111
Read: $FF0FFF0F 11111111000011111111111100001111 FAILED
Write: $0F0FF0F0 00001111000011111111000011110000
Read: $FF0FFFF0 11111111000011111111111111110000 FAILED
Write: $00000000 00000000000000000000000000000000
Read: $FF00FF00 11111111000000001111111100000000 FAILED
Addr $00010400
Write: $AAAAAAAA 10101010101010101010101010101010
Read: $FFAAFFAA 11111111101010101111111110101010 FAILED
Write: $55555555 01010101010101010101010101010101
Read: $FF55FF55 11111111010101011111111101010101 FAILED
Write: $F0F0F0F0 11110000111100001111000011110000
Read: $FFF0FFF0 11111111111100001111111111110000 FAILED
Write: $0F0F0F0F 00001111000011110000111100001111
Read: $FF0FFF0F 11111111000011111111111100001111 FAILED
Write: $0F0FF0F0 00001111000011111111000011110000
Read: $FF0FFFF0 11111111000011111111111111110000 FAILED
Write: $00000000 00000000000000000000000000000000
Read: $FF00FF00 11111111000000001111111100000000 FAILED
Addr $00020400
Write: $AAAAAAAA 10101010101010101010101010101010
Read: $FFAAFFAA 11111111101010101111111110101010 FAILED
Write: $55555555 01010101010101010101010101010101
Read: $FF55FF55 11111111010101011111111101010101 FAILED
Write: $F0F0F0F0 11110000111100001111000011110000
Read: $FFF0FFF0 11111111111100001111111111110000 FAILED
Write: $0F0F0F0F 00001111000011110000111100001111
Read: $FF0FFF0F 11111111000011111111111100001111 FAILED
Write: $0F0FF0F0 00001111000011111111000011110000
Read: $FF0FFFF0 11111111000011111111111111110000 FAILED
Write: $00000000 00000000000000000000000000000000
Read: $FF00FF00 11111111000000001111111100000000 FAILED
CUT A BUNCH FOR BREVITY
Addr $001E0400
Write: $AAAAAAAA 10101010101010101010101010101010
Read: $FFAAFFAA 11111111101010101111111110101010 FAILED
Write: $55555555 01010101010101010101010101010101
Read: $FF55FF55 11111111010101011111111101010101 FAILED
Write: $F0F0F0F0 11110000111100001111000011110000
Read: $FFF0FFF0 11111111111100001111111111110000 FAILED
Write: $0F0F0F0F 00001111000011110000111100001111
Read: $FF0FFF0F 11111111000011111111111100001111 FAILED
Write: $0F0FF0F0 00001111000011111111000011110000
Read: $FF0FFFF0 11111111000011111111111111110000 FAILED
Write: $00000000 00000000000000000000000000000000
Read: $FF00FF00 11111111000000001111111100000000 FAILED
Addr $001F0400
Write: $AAAAAAAA 10101010101010101010101010101010
Read: $FFAAFFAA 11111111101010101111111110101010 FAILED
Write: $55555555 01010101010101010101010101010101
Read: $FF55FF55 11111111010101011111111101010101 FAILED
Write: $F0F0F0F0 11110000111100001111000011110000
Read: $FFF0FFF0 11111111111100001111111111110000 FAILED
Write: $0F0F0F0F 00001111000011110000111100001111
Read: $FF0FFF0F 11111111000011111111111100001111 FAILED
Write: $0F0FF0F0 00001111000011111111000011110000
Read: $FF0FFFF0 11111111000011111111111111110000 FAILED
Write: $00000000 00000000000000000000000000000000
Read: $FF00FF00 11111111000000001111111100000000 FAILED
NO Chipmem detected
- Checking status of mousebuttons for different startups, if still pressed
we assume not working and ignore those in the future.
Green newly pressed, Yellow pressed at startup - Startupaction taken.
Red = Pressed at both poweron and now so it is stuck and being ignored
P1LMB P2LMB P1RMB P2RMB
The following special action will be taken:
P1LMB - Try to find fastmem and if found use it! if not use chipmem but no display
- Parallel Code $fc - Trying to find some fastmem (as requested at powerup)
- Parallel Code $fb - Memorydetection done
- Parallel Code $80 - NO Chipmem detected
- NO MEMORY FOUND - HALTING SYSTEM
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By the look of your diagnostic log, every time it writes and tries to read back a word the even/high byte reads $FF. But writing a byte is reported to work. It seems like the RAM and the bus buffers must work but the bus buffer/latch for D8~D15 is not being enabled during a word access? Could still be a problem with Gary.
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There are a few different possible causes. Could be that both DRAMs U18 and U19 have failed, which can sometimes happen. Or as mentioned above, half of the data bus bridge has a problem; likely U12 or U13 missing one of the control signals. Might be a defective U12 or U13, which is less likely.
Would be easy to see what's going on if you had an oscilloscope, so without one my suggested approach would be:
1. Carefully inspect the PCB for any physical damage, scratched tracks, etc.
2. Inspect the IC sockets for contamination or damage of any contacts, especially U2 and U5. If in doubt, replace the socket.
3. Replace U18 only, run DiagROM again and see if data bits 8-11 are now working, if so, replace U19 as well and that should fix it.
4. Else you could try replacing octal buffer ICs U12 and U13.
5. If that doesn't fix it, you likely have a connection problem to U12/U13. Which would be a few seconds to find with an ocilloscope, or a few hours to find with a continuity tester. Though you'll probably struggle to correctly measure an open circuit if it's caused by a contact issue in the PLCC84 socket (U2). So you could try replacing the U2 socket if you don't find an obvious connection/continuity problem.
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Good job Castellen!
Sure enough the U18 and U19 were both bad. I'm curious about how you determined that by the log dump.
Since this is a rev 6 mobo I went ahead and de-soldered the existing (4) DRAMS, then installed ( 8 ) sockets, then started testing the DRAM. It now rocks 1MB with ( 8 ) 4256 TI chips. I wound up swapping the good (2) out so I could match all to 80ns. The existing DRAMs are 70ns.
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Thankfully I was able to dodge a possible 'intermittent Gary' with the DRAM replacements.
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For troubleshooting, I ask...
Reading memory from right to left
Write: $00000000 00000000000000000000000000000000
Read: $FF00FF00 11111111000000001111111100000000 FAILED
Each (2) 4256 chips = (1) 256KB chip memory bank. Does something like this point to one the 4256 working while the other is failing? I thought I heard/saw/read something about memory goes to the start of (2) chip banks then to the second half of the chip bank. The start of the chip memory bank is U16 + U17.
chip bank 1 = U16+U18
chip bank 2 = U17+U19
on the READ above, since the first half of bank1 and bank2 is working so the READ = correct; but the second half of the bank fails so READ=FAILS
11111111000000001111111100000000
---U19--+---U17--+---U18--+---U16--+
--FAIL---+--GOOD-+--FAIL--+--GOOD-+
It's hard to write this out without knowing. These are all questions! I could be completely misinterpreting! DO NOT TAKE THIS AS FACT!
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For troubleshooting, I ask...
Reading memory from right to left
Write: $00000000 00000000000000000000000000000000
Read: $FF00FF00 11111111000000001111111100000000 FAILED
Each (2) 4256 chips = (1) 256KB chip memory bank. Does something like this point to one the 4256 working while the other is failing? I thought I heard/saw/read something about memory goes to the start of (2) chip banks then to the second half of the chip bank. The start of the chip memory bank is U16 + U17.
chip bank 1 = U16+U18
chip bank 2 = U17+U19
Not quite. Each DRAM is 4-bits wide, and the memory in the A500 is 16-bits wide total. So you need 4 x 4-bit DRAMs for a memory width of 16-bits. i.e. It uses all four DRAMs to form the single 512KB block of memory.
The 68000 can deal with 32-bit numbers, however the memory is physically 16-bits wide in the A500. In order to store a 32-bit long word, it has to use two consecutive 16-bit words in memory.
That's why in DiagROM you see the same error in the 32-bit test pattern twice. It writes the 32-bit long word, which spans two words in the 16-bit memory, then reads back what was written to the same two words. When there are any bad DRAMs, you see the same defective bits mirrored in both the top and bottom half of the 32-bit long word.
As for which DRAM does which nibble (group of 4 bits), you just need to look at the A500 schematic.
When you've populated the second lot of DRAMs, it's added a second block of 512KB, the 8 devices forming a single 1MB memory block.