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Amiga computer related discussion => Amiga Hardware Issues and discussion => Topic started by: nyteschayde on February 16, 2012, 07:42:34 PM
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So I have been drooling over all the ideas of things to build while pouring over sites like sparkfun.com (http://www.sparkfun.com), mbed.org (http://mbed.org), and others. One thing I was thinking might be fun is to somehow get a SIMM or DIMM socket, plug it into a breadboard with some RAM and then write some sort of (magic) interface on the mbed microcontroller to make a RAM card for an A1200.
The things I think I'd need are
- Some sort of software memory controller (not sure how complicated this is at all; any ideas would be great. Had thought about looking at WinUAE sources for how memory was controlled on the Amiga)
- Some code on the mbed to initialize the RAM in AutoConfig
- More understanding on the pin outs of the trap door access bus
- And actually doing it of course.
I've also been wondering how hardware accelerators actually work. Somehow they need to tell the Amiga to use whatever is on their card vs. the onboard CPU.
- Is it as simple as the ROM remap? (i.e. if rom is located at address b, then in memory set the new address to address c?)
- Early A500 CPU upgrades literally took out the 68000 and put in a 68010 or 68020 into the same slot. I know it's totally naive to assume this but how are the pins on the motherboard that connect to motherboard CPU rerouted to pins on the CPU on an accelerator board over the trapdor expansion bus? It seems like it would have to be that those pins map to some registers of the motherboard CPU or something and somehow those registers are rerouted to the registers of the CPU on the accelerator board.
Obviously I understand only bits and pieces here. It would be nice if anybody with excess amounts of time and boredom who actually knows this stuff could explain some (or all of it) to me.
Thanks
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I'm not sure that a microcontroller is the right thing to put in between the 680x0 and the DDR. For a coupl edifferent reasons.
First is that you need enough IO pins to look at the 680x0 bus and to control the DDR and read/write data.
Second, I'm not sure you can do that, even with enough IO pins, in the timing required. The 680x0 bus runs at a certain speed. The microcontroller needs to run fast enough to sample that side IO, do whatever magic you need it to do, talk to the DDR at DDR bus speeds, then send stuff back to the 680x0 side again in amounts of time legal to both the DDR and 680x0 sides. I'm not sure a regular microcontroler has a chance of that. Perhaps an XMOS, which is essentially a microcontroller designed to have a lot of IOs and guarantee certain things in timing. I don't know if it's fast enough for DDR, but it's probably fast enough for 68020 in an A1200.
I'd think of an FPGA for a memory controller out of habit. perhaps XMOS can do it too, look into that more. But an ARM, which I understand to be on there? I don't think so. I once implemented an ARM APB bus over a couple 32bit parallel IO ports to play with in simulation. It was pretty slow that way. I don't think it would be useful in the real world. We ended up not using it in our simulation situation either. It might be fun to play with, but not practically useful for anything.
Keep in mind that WinUAE does not talk to memory hardware. It talks to Windows or Linux or whatever. So it doesn't know how to talk to DDR. probably the only thing that does in that situation is the Northbridge chip, or the CPU if it's recent enough to have the memory controller moved there. I don' tthink that even Windows knows about how to talk to DDR on a DDR protocol chip pin level. I can't imagine why it would need to know that anyway.
Minimig Verilog code is probably more relevant to your project, but you'd need to port that to whatever kind of language works in your design.
You'd need to look at DDR specs. Signal levels, timing, chip pinouts, and bus protocol from the specs for the memory chips. That's what you need to talk to on that side of the microcontroller/XMOS/FPGA. Then you need to look at the 68020 specs from Freescale, and learn how the pins and bus protocol for that work. You'll be looking at waveforms, and trying to respond to and to generate those waveforms in your memory controller design. (ARM software, VHDL FPGA circuit, whatever)
Heck, start with the DIMM and 68020 pinouts. Do you have enough controllable IOs for that?
Hmmm. OK, if ARM chip has its own memory on the board, perhaps you only need to talk to the 68020 side, and ARM software of your design stores things in ARM memory as if it is ARM data, and sends that back out when 68k reads from it. Doesn't let you use a DIMM, but perhaps saves you a lot as well. Still don't know if that's fast enough to make the 68020 happy.
The last issue I can think of is signal integrity. Not sure how fast your DDR would run, but consider the DDR PCB layout whitepapers from Freescale and others. They make suggestions to keep signals clean. Can you keep signals clean enough on a breadboard for this?
I'd like to learn more about the accelerator takign over the motherboard CPU too. What little I've heard about this says to tie motherboard CPU halt signal to the halt value, and CPU stops doing stuff.
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I was thinking about something like the XESS "XULA" board. It's got 8MB of SDRAM and a Spartan 3 FPGA. But it's not 5v tolerant.
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I was thinking about something like the XESS "XULA" board. It's got 8MB of SDRAM and a Spartan 3 FPGA. But it's not 5v tolerant.
That's perhaps a better choice. 68 IO pins, could be enough to connect 68020 to the XULA onboard SDRAM. Want a DIMM? Maybe not enough. Is it 5V tolerant? I see a 5V labelled connection on the board, but I don't see anything saying the FPGA is 5V or 5V-tolerant. Not many are anymore, and my Spartan3 board has QuickSwitches on it to make it safe in a 5V PCI slot, as the 3.3V chip is not tolerant alone.
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Wow, both of you seem to know a lot more than me. I'd love to sit down for an hour, work on something simple with either of you and pick your brains and make notes. Given I'm in California, though that will likely not happen. :)
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Is it 5V tolerant? I see a 5V labelled connection on the board, but I don't see anything saying the FPGA is 5V or 5V-tolerant. Not many are anymore, and my Spartan3 board has QuickSwitches on it to make it safe in a 5V PCI slot, as the 3.3V chip is not tolerant alone.
The 5v connection on the board is just one of the power options. You can run it off the USB power or some combination of 5v or 3.3v if you want to embed it into a project. The i/o pins themselves are not 5v tolerant.
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Regarding the number of I/Os on the microcontroller (of any type), do they have to match 1:1 to each pinout on the CPU or do they only need to communicate with the pinouts on the trapdoor bus edge connector (and are those the same number of pins as the CPU?).
Also, why do they need to match? I was of the (likely misguided) impression that by the time the data reached the bus edge connector we'd be going through some software layer already and wouldn't need quite soo many GPIOs. Look at me, using acronyms like GPIO. :)
Can you recommend a getting started guide for things like resistors, capacitors, diodes, etc...? My only understanding of them comes from the world of car audio installation and does not directly relate to all the things needed in the world of microcontroller hackery.
Final question in this reply, do you think SDCard speeds are fast enough for a stock A1200 SLOW RAM? I mean the CPU is running at what? 14MHz? Maybe I have a totally misguided understanding of BUS speeds on the stock A1200.
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I have an mbed here, and it is pretty fast responding to interrupts... So I expect that with an external clock (the internal timers seem to be micro second accurate so not precise enough for bus sampling) it might be able to keep up... Your big problem is lack of I/O, as realistically, you've got under 30 pins and the address/Data bus of the 68000 needs 52 alone!!
An FPGA might be better here :)
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Regarding the number of I/Os on the microcontroller (of any type), do they have to match 1:1 to each pinout on the CPU or do they only need to communicate with the pinouts on the trapdoor bus edge connector (and are those the same number of pins as the CPU?).
Also, why do they need to match? I was of the (likely misguided) impression that by the time the data reached the bus edge connector we'd be going through some software layer already and wouldn't need quite soo many GPIOs. Look at me, using acronyms like GPIO. :)
Can you recommend a getting started guide for things like resistors, capacitors, diodes, etc...? My only understanding of them comes from the world of car audio installation and does not directly relate to all the things needed in the world of microcontroller hackery.
Final question in this reply, do you think SDCard speeds are fast enough for a stock A1200 SLOW RAM? I mean the CPU is running at what? 14MHz? Maybe I have a totally misguided understanding of BUS speeds on the stock A1200.
This is what you need:
http://www.falstad.com/circuit/
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The lack of viable 5v parts is a serious problem in new Amiga designs.
You spend half your time just trying to interface available parts without screwing up the timing and adding latency.
3.3v tolerance is becoming harder to find even.
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The lack of viable 5v parts is a serious problem in new Amiga designs.
You spend half your time just trying to interface available parts without screwing up the timing and adding latency.
3.3v tolerance is becoming harder to find even.
Plenty of Microcontrollers are still 5v tolerant... But I think you are right about FPGA, where even 3.3Volt is old now...
It's getting harder to find video display equipment that will acce
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The lack of viable 5v parts is a serious problem in new Amiga designs.
You spend half your time just trying to interface available parts without screwing up the timing and adding latency.
3.3v tolerance is becoming harder to find even.
Plenty of Microcontrollers are still 5v tolerant... But I think you are right about FPGA, where even 3.3Volt is old now...
It's getting harder to find video display equipment that will accept an Amiga Video signal too... The Amiga is old :-/
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All I've ever heard was 3.3v or 5v. What is the new "common" voltage for such things if even 3.3v is getting old?