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Amiga News and Community Announcements => Amiga News and Community Announcements => Amiga Retail News / Sales => Topic started by: Joshua on May 02, 2005, 11:27:49 PM
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Forefront Technologies is pleased to announce it now offers the AmigaOne XE USB and DMA fixes.
These hardware fixes correct USB hot plug detection and DMA lockup problems on AmigaOne XE mainboards. Forefront stands behind their work, making this the only risk-free option available to AmigaOne customers (see details (http://www.forefronttechnologiesinc.com/Products?item=106)). This service is FREE to customers that purchased their AmigaOne mainboards from Forefront, and only $25 for others!
* More information is available here (http://www.forefronttechnologiesinc.com/Products?item=106).
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Um... I'm not sure if I'm reading this right, but using a PCI-based IDE controller doesn't fix the DMA problems, in fact it would increase the cache-misses. However, they could be saying that even with the fix, the onboard IDE within the VIA"s chipset is not the most stable, so they recommend an off-chipset controller, and in that case it sounds as if they have done a good patch job.
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>I'm not sure if I'm reading this right, but using
>a PCI-based IDE controller doesn't fix the DMA
>problems, in fact it would increase the
>cache-misses.
Cache coherency must be dealt with in software in the OS4 driver. I don't know why SiI's PCI chip would have more cache misses than Via's chip, can you explain this more?
>However, they could be saying that even with the
>fix, the onboard IDE within the VIA"s chipset is
>not the most stable, so they recommend an
>off-chipset controller, and in that case it sounds
>as if they have done a good patch job.
Eyetech has numerous times recommended the use of a SiI0680 PCI card as an easier and cheaper solution to the Via IDE DMA problem compared to the PCB mod. I think they also said this was a solution before the PCB mod was offered by anyone.
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>Cache coherency must be dealt with in software in
>the OS4 driver. I don't know why SiI's PCI chip
>would have more cache misses than Via's chip, can
>you explain this more?
Cache misses aren't the DMA bug, data corruption is. The VIA's chipset only uses a small segment of the full DMA capability, which limits the data corruption which occurs over it. Now, the SiI chip uses the full DMA spectrum, which causes more data corruption.
Even today people STILL don't grasp what the MAI problem is. It isn't a cache miss, it's data corruption.