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Amiga computer related discussion => Amiga Hardware Issues and discussion => Topic started by: FrenchShark on September 13, 2008, 01:37:07 AM
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Hello,
It is a little bit OT but, it can be interesting for Minimig owners.
I have ported the coin-op game from Capcom to an FPGA.
Check this little video:
http://www.youtube.com/watch?v=9UuDf9zZqCg
The game fits in 3500 LEs (I did not write the sound part yet).
It is displayed on a VGA screen at 1280x1024, 60Hz.
The internal architecture is built on 16-bit bus running at 24 MHz (384 clocks per scanline, 1048 lines per frame) with a 8-channel DMA scheduler :
- the main Z80
- the audio Z80 (not used yet)
- the scroll #1 tilemap
- the scroll #2 tilemap
- the scroll #1 graphics
- the scroll #2 graphics
- the sprite graphics
- the character graphics
All the game ROMs (864KB) are stored in an external SSRAM and are accessed through DMA.
If the Minimig HW is fitted with 10ns SRAM, it is possible to run this game.
Regards,
Frederic
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Nice work. So, is the standard aCube Minimig fitted with 10ns SRAM?
I must admit to liking 1943. The Amiga version of 1943 runs well, but a pure arcade version would be very nice.
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Darrin wrote:
Nice work. So, is the standard aCube Minimig fitted with 10ns SRAM?
Unfortunately no, it has 55ns SRAM.
I think it may be possible to optimize the DMAs to make them run on a 16 or 12 MHz bus :
One cycle out of 4 is given to the main Z80 and one cycle out of 8 to the audio Z80. But, these two Z80 use 8 bits out of the 16 bits read. With a simple caching of the second byte fetched, almost 50% of the Z80 fetch cycles can be saved.
The FPGA implementation can display 128 sprites per scanline, which will never happen (even the NeoGeo displays a maximum of 96 sprites per scanline). A lot of DMA slots are wasted here. I think I might be able to set the limit to 32 or 48 sprites.
I must admit to liking 1943. The Amiga version of 1943 runs well, but a pure arcade version would be very nice.
Honestly, I was pretty disapointed by the Amiga version.
The FPGA version seems to be smoother than the arcade : there is no slow down when a lot of sprites are on the screen. This is because I made the main Z80 working at 24 MHz instead of 6 MHz. Just the instruction fetches are limited to 6 MHz. The animation is anyway synchronized with the VBLANK interrupt so the extra speedup on the Z80 does not turn the game into an implayable one.
Now, I am working on a scale2x algorithm to improve the graphics.
Regards,
Frederic
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Frederic, do you have a partnummber from Digikey for 10ns ram that will fit into the minimig ?
Edit:
Could this sram working ?
IS64WV51216BLL-10CTLA3
http://www.issi.com/pdf/61-64WV51216.pdf
I will try this for you.
Do you think games with 68k and z80
are possible on the minimig ? Maybe the cps1 and cps2 games.
Jens
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Would the Minimig (in Amiga mode) benefit from faster ram over the Ram used already ? And pin to pin compatibility ? compatibility ?
How is it going to affect the game, with the 68000 Hardwired on the board ?
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The only difference between IS64WV51216 and IS62WV51216 used in MiniMig is the numbering order of the address lines. Power, data and control lines are all in the same place.
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jensl wrote:
Frederic, do you have a partnummber from Digikey for 10ns ram that will fit into the minimig ?
From what i have seen, there ARE compatible 10ns Ram, but I don't like the order quantities from Digikey (Like, 1000)
Not spending $18,000 just because I want two of the {bleep}s.
At that rate, I would buy two pieces at $77 each from Farnell. :(
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Illuwatar wrote:
The only difference between IS64WV51216 and IS62WV51216 used in MiniMig is the numbering order of the address lines. Power, data and control lines are all in the same place.
So, then does that mean they are not compatible ?, because the Address lines are ordered differently ? (I would have thought that it DOES matter), The FPGA would be calling Addresses on the wrong pins, Meaning that the FPGA core would need to be recompiled with the appropriate Address lines on the correct FPGA pins for the board layout.
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This part should also work.
IS61WV51216BLL-10TLI and is orderable in 1 quantity for about 17$ from Digikey
Jens
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jensl wrote:
This part should also work.
IS61WV51216BLL-10TLI and is orderable in 1 quantity for about 17$ from Digikey
Jens
But the pins are different.
Look at the minimig 1.1 Schematics, compared to the PDF from Digikey.
An example, Pin 23 (A13, RAM_A14 on minimig) is A10 on the chip, the point I am making is that the FPGA would need recompiling to match the NEW address lines for the chips. They may be Pin for pin compatible for +V or GND, and Data, but the Address pins are different.
On minimig's FPGA, RAM_A14 is on pin 64 of the FPGA, for the new chips, Pin 23 is A10, which on the FPGA is RAM_A11 (Pin 61).
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I don't think the address line order actually matters in this case. Yes - you will end up, reading a different memory cell compared to the correct RAM type, but you will always end up at the same cell. SRAM does not care about order as long as you are inside the address range.
But the price and availability is an other issue... :-(
Edit: IS61WV51216 and IS64WV51216 do have the same pin layout (they share the same data sheet too), so you have the address line renumbering issue in both. If there were sockets for 44-TSOPII, then this would be a simple issue to test (or if someone have some professional resoldering station that removes SMD without damaging the PCB).
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Illuwatar wrote:
If there were sockets for 44-TSOPII, then this would be a simple issue to test (or if someone have some professional resoldering station that removes SMD without damaging the PCB).
I have taken these chips off Damaged boards before, but that was with a standard 20W soldering wand, I would not wish to push my luck. The board was damaged any way, and i was moving the chips to a fresh new board, several pads DID move but again, board = damaged any way = Me not care.
For the record, this was a Minimig board that someone else messed up the FPGA soldering, so slowly I am moving the components over to the new board, and I am probably going to do the Clothes Iron trick to get the FPGA off.
http://uk.youtube.com/watch?v=976AIzyTyv8
[edit] hey where do you get this bloody stuff from ?
http://uk.youtube.com/watch?v=FTQqjggeklo&feature=related
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Haha, nice trick with the flat-iron.
I use every day the hot air from Leister.
http://www.klappenbach.de/html/hot_jet_s.html
I will order some 10ns sram from digikey.
I will report the results next week.:)
Jens
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Illuwatar wrote:
I don't think the address line order actually matters in this case. Yes - you will end up, reading a different memory cell compared to the correct RAM type, but you will always end up at the same cell. SRAM does not care about order as long as you are inside the address range.
Illuwatar is completely right about address lines ordering.
Some SRAM manufacturer like Cypress just specifies A0 and A1 locations in their SSRAM datasheet (because of burst mode), the other address pins are just named "A".
The same remark is valid for the data lines (as long as you keep the data lines in the same byte group for x16 and x32 chips)
Regards,
Frederic
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jensl wrote:
Haha, nice trick with the flat-iron.
I use every day the hot air from Leister.
http://www.klappenbach.de/html/hot_jet_s.html
I will order some 10ns sram from digikey.
I will report the results next week.:)
You won't notice any speed improvement with Minimig.
The DMA scheduler has to be rewritten for that.
That would be a nice project : 57 MHz bus speed, 4 times the AGA speed...
Regards,
Frederic
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whiteb wrote:
Would the Minimig (in Amiga mode) benefit from faster ram over the Ram used already ? And pin to pin compatibility ? compatibility ?
Yes, if the DMA scheduler is rewritten.
How is it going to affect the game, with the 68000 Hardwired on the board ?
The 68000 will be disabled.
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jensl wrote:
Do you think games with 68k and z80
are possible on the minimig ? Maybe the cps1 and cps2 games.
Jens
I though about these games too.
I do not know if the Spartan is big enough.
I am working only with Altera parts. In my case, the EP3C16 is only 24% full and the fmax is >50 MHz so I have plenty of room for the audio Z80 or a 68000 (for a CPS1/2 or also a system 16).
I am thinking about the NeoGeo or the PC Engine.
The only issue with the NeoGeo is the size of the game, I might need to buy a DE2-70 and upgrade it to 128MB of SDRAM and 8MB of SSRAM.
Regards,
Frederic
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UPDATE:
I have implemented a first version of Scale2X.
Now, the design takes 4900 LEs.
It is because I have a Scale2X algorithm for each layers (there are five layers on this game), it may be a little bit overkill.
I have to tell you : the Scale2X results are quite amazing !
I will post a new video soon.
Regards,
Frederic
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FrenchShark wrote:
jensl wrote:
Haha, nice trick with the flat-iron.
I use every day the hot air from Leister.
http://www.klappenbach.de/html/hot_jet_s.html
I will order some 10ns sram from digikey.
I will report the results next week.:)
You won't notice any speed improvement with Minimig.
The DMA scheduler has to be rewritten for that.
That would be a nice project : 57 MHz bus speed, 4 times the AGA speed...
Regards,
Frederic
Well, add that to your list of tasks then :)
From what I am aware, AGA on Minimig is not going to happen, due to space, and due to the lack of documentation on the hardware. Additionally, the future production of NatAmi.
I do not feel confident about desoldering the 55ns ram from my Minimig, but making a new one at 10ns is not out of the question.
But to justify the cost, are we talking about more games than just 1943 being able to be run ?
But the one thing, the more complex the game, the more LE's needed, and at some point the Spartan 3 will fill up. is there a new board on the books with new FPGA ?
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The largest Spartan 3 in QFP208 (that package used for MiniMig) is the 3E with 500k gates. Going bigger means BGA that is impossible to solder for most DIY freaks here...
If the BGA issue could be solved in some way, then there are not a big deal to create a larger MiniMig that could be code compatible (almost) with the original design - and in the same moment, add more RAM and a better video-DAC for 24bit graphics. The PCB itself needs to be at least 4-layer when using BGAs, but that is more a cost issue than a design problem.
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Illuwatar wrote:
The largest Spartan 3 in QFP208 (that package used for MiniMig) is the 3E with 500k gates. Going bigger means BGA that is impossible to solder for most DIY freaks here...
If the BGA issue could be solved in some way, then there are not a big deal to create a larger MiniMig that could be code compatible (almost) with the original design - and in the same moment, add more RAM and a better video-DAC for 24bit graphics. The PCB itself needs to be at least 4-layer when using BGAs, but that is more a cost issue than a design problem.
The Minimig FPGA has 400k gates from memory, and yes, BGA is a {bleep}, its not a simple soldering Iron job (at any pitch), Reflow toaster ovens are needed.
I think I will stick with my current minimig the way it is :)
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whiteb wrote:
But to justify the cost, are we talking about more games than just 1943 being able to be run ?
Currently, I can easily run the 3 versions of 1943 and Gunsmoke.
With few modification, I can run 1942 and Commando.
Then, the next step will be one of these : CPS1, CPS2, System16, (S)NES, MegaDrive, NeoGeo, PC Engine.
Regards,
Frederic
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Hello,
I have posted a new video on youtube with Scale2X algorithm. Unfortunately, the quality of youtube video sucks, so you cannot really see the difference.
http://www.youtube.com/watch?v=c39E5lhOPTM
Now, I need to take care of the sound chip : the YM2203. It won't be so easy.
I have checked which game shares the same 1943 hardware, there are four :
- 1943 Kai
- Commando
- Gunsmoke
- Black Tiger
Regards,
Frederic
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Iluwater , maybe you can tell me,
is the 500k xilinx pin compatible to the 400k ?
Thanks
Jens
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Unfortunately the 500k and 400k FPGAs are not pin compatible.
The come from different product families (Spartan 3 vs Spartan 3E) and pins have been moved all over the place.
Edwin
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That's true - the 3E series and the 3 series are not direct replaceable. You need a new PCB design for that 100k gates extra. I have been working on a design like this - I have a partial drawing of a MiniMig with 8 MB SRAM using this Spartan 3E. But the difference in hardware requires a recompiled MiniMig core too. For these arcade classics, changing the FPGA seems to be a non-issue. But is it worth the work in creating a new PCB that uses the Spartan 3E for just 100 000 gates more? At least the memory could be counted for (replace the 512k x 16 with 1M x 16, 10ns)...
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Side Arms should also share the Commando Board.:)
http://www.system16.com/hardware.php?id=788
Jens
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jensl wrote:
Side Arms should also share the Commando Board.:)
http://www.system16.com/hardware.php?id=788
Jens
Right, I forgot this one.
Anyway, every game are different enough to be obliged to have a different FPGA configuration for each.
It is true even for 1943 and 1943kai, because of a slightly different color palette.
Moreover, the DMA engine also changes if the game is in "portrait" or "landscape" mode.
Regards,
Frederic
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And here are the results.
I have tried my own Minimig board and also on a complete new Minimig board that I have build.
The Minimig starts without problem, but the Kickstart Logo
does not appear. After that, I get a Guru Meditation.
Any Ideas ?
MfG
Jens.L
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Hello Jens,
can you give us the Guru number ?
Is it with KickStart 1.3 ?
Regards,
Frederic
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Hey, cool project! Do you have any project page?
Are the sources available?
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Cool indeed. Would the older Cave games work, I wonder?
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Nice work.
What are the differences between this implementation and the actual arcade hardware? Did that have a 16-bit bus?
I presume that the 1280x1024 VGA output is not generated by the game, but by some form of scan doubler/quadrupler, capturing the simulated game video hardware's output? I guess adding Scale2x, etc, algorithms in hardware to this module doesn't touch the arcade game hardware at all, and can be re-used for other games in the future?
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Nice work.
What are the differences between this implementation and the actual arcade hardware? Did that have a 16-bit bus?
I presume that the 1280x1024 VGA output is not generated by the game, but by some form of scan doubler/quadrupler, capturing the simulated game video hardware's output? I guess adding Scale2x, etc, algorithms in hardware to this module doesn't touch the arcade game hardware at all, and can be re-used for other games in the future?
Hello,
it is funny to see this thread resurfacing after 5 years...
IIRC, the original HW outputs a 256 x 192 screen. The Scale2X algorithm increases the resolution to 512 x 384. It is then scandoubled to 1024 x 768 (actually 768 x 1024 since it is rotated by 90deg.)
The core can execute few more games like 1943 Kai, Gun smoke, Sidearms, Commando and Black tiger.
The sound is still missing but recently, I started working on FM synth yamaha chip core.
Regards,
Frederic
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frenchshark, i wrote you a private pm, please get back to me!
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@FrenchShark
Can these games be ported to MCC-216?
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@FrenchShark
Can these games be ported to MCC-216?
This is planned.
The problem is I wrote that stuff 5 years ago and used a SSRAM controller.
Regards,
Frederic
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So where is the code? I see this so often with people developing cool stuff on FPGAs, they show a video tease of it working but don't post the code so anyone else can play with it. Virtually every microcontroller project you see someone showing off online has the code available, or at least a hex file.