Amiga.org
Amiga computer related discussion => Amiga Hardware Issues and discussion => Topic started by: TobiFlex on November 26, 2007, 12:49:53 PM
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Today I have publish my 68K CPU Core:
Open Source 68000 IP Core (http://www.opencores.org/projects.cgi/web/tg68/overview)
Viele Grüße
TobiFlex
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Thank you!!!
Do you think it would be hard to add 68020 support?
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Bravo! 3000 lines too, I'm impressed.
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Do you think it would be hard to add 68020 support?
Yes!
But for now we can clock the CPU faster. The CPU Kernal is very fast and only the bus wrapper make it slow.
The Kernal is 2x-3x faster then the 68000 with the same clock and you can clock them with 28MHz.
I think it is possible to make the minimig 8x-12x faster then the original.
Viele Grüße
TobiFlex
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Keep up the good work !
:-)
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Well done! Very good of you and in keeping with the spirit to open source it too :-)
Andy
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Thats awesome the whole mini mig thing is. In college we made the 68000 trainers in an altiera FPGA like the mini mig and was a great learning experience but to model the CPU too would have been awesome. I'm impressed.
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Excellent work. I am glad you were able to release your work.
Is there any attempt to make the instruction timings the same as the original 68k?
Why do I ask?
It's just that some programs rely on the timing of the 68k instructions relative to the rest of the Amiga hardware.
Compatibility is as important than speed IMHO.
It is a million times worse for the Atari ST where there were no accelerators and standard 68k CPU instruction timing was the core to everything. A large % of ST games rely on it.
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Is there any attempt to make the instruction timings the same as the original 68k?
most of the byte and word instructions are exact. Long and mulu/divu/rotation instructions are faster. But - Hehe - this is version 1.0!
Viele Grüße
TobiFlex
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VHDL? Ewww! Just kidding. This is really cool. Thanks TobiFlex! (Though it would have been even more cool in verilog)
Is there a free vhdl simulator ala Icarus, or a translator, or can Icarus do vhdl since I last read up on it? I can use Modelsim at work but am not supposed to use it for not-work things. ;)
In partial answer to my own question, though I'm not sure if any are good or even workign at all yet:
http://www.symphonyeda.com/proddownloads.htm
http://ghdl.free.fr/
http://freehdl.seul.org/
Though the 68K in VHDL and Minimig in Verilog poses a full-system simulation challenge. Modelsim can do multi-language simulations. Is there a working free simulator that does this?
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Well Done!
:bow: :bow: :bow: :bow: :cheers: :cheers: :cheers:
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Awesome! :-)
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TobiFlex wrote:
this is version 1.0!
I understand and I take my hat off to you.
There are some subtle undocumented 68k behaviour that you might be interested in:
http://www.trzy.org/files/68knotes.txt
http://pasti.fxatari.com/68kdocs/
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Into the first link I can read this:
Much of my testing was conducted on the MC68EC000 processor
The MC68EC000 is different from the 68000. I have my Core let run against a real MC68HC000 and can not find software differences when the Kickstart or some programms are running. So I know all importand Instructions works correct. About never used Instructions I can not say anything.
Example: I have found no program for the AMIGA that use CHK or MOVEP Instructions.
About the doc on the second link. My Core use no prefetch. My Core use classical Fetch/Execute last - Decode - Fetch next/Execute - order.
Thats why most Instrucions can execute in 2 clocks. The Bus wrapper expand this to 4 clocks.
But for the minimig is the prefetch not so important. The core is fast enough to decode the opcode between as=high. So the timing is the same as the 68000 timing.
On my DE2 Board with a real MC68EC000 and running ANARCHY1 DEMO I can see some rendering error but with the softcore I can not.
I dont know what happens but I think my core has a high Betatested Level. (Upss I hope you can understood my - sorry for my poor english)
Viele Grüße
TobiFlex
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Interesting.
Try this program
http://amiga.nvg.org/warlock/adf/b/Birk+Sundell/100C64Tunes.adf.gz
It is known to be sensitive to 68000 incompatibility. I dont think it will work, but if it does, then great!
The Hardwired demo (http://ada.untergrund.net/showdemo.php?demoid=144) times the 68000 multiply instruction and if it is not a time it expects it comes up with: "This demo don't like Axel". (Axel = Accelerator)
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Excellent news!!
This opens up some whole new possibilities...
(pondering about Minimig rev2.0 :-D )
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TobiFlex wrote:
I dont know what happens but I think my core has a high Betatested Level. (Upss I hope you can understood my - sorry for my poor english)
Viele Grüße
TobiFlex
I wish my German was as good as your English :-(
Well done, by the way!
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This is fantastic!
The unstoppable steamroller that is Minimig rolls on!
Let's see....
If it is Captain Dennis then it is definitely Lieutenant Tobias! :-)
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Try this program
http://amiga.nvg.org/warlock/adf/b/Birk+Sundell/100C64Tunes.adf.gz
Ha! OPCODE 0x0F0E MOVEP.W .....
My Validator stop here.
Thank You Alexh. Now I can Implement the Movep Instruction.
Do you know a .ADF Source from the hardwired demo?
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Excellent news!!
This opens up some whole new possibilities...
(pondering about Minimig rev2.0 )
I'm also on the bridge, Captain. ;-)
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I did a quick compile with webpack 6.3.03i:
Device utilization summary:
---------------------------
Selected Device : 3s400pq208-4
Number of Slices: 2627 out of 3584 73%
Number of Slice Flip Flops: 1052 out of 7168 14%
Number of 4 input LUTs: 4841 out of 7168 67%
Number of bonded IOBs: 74 out of 141 52%
Number of GCLKs: 1 out of 8 12%
=========================================================================
TIMING REPORT
NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
GENERATED AFTER PLACE-and-ROUTE.
Timing Summary:
---------------
Speed Grade: -4
Minimum period: 39.906ns (Maximum Frequency: 25.059MHz)
Minimum input arrival time before clock: 16.900ns
Maximum output required time after clock: 16.576ns
Maximum combinational path delay: No path found
I need a bigger FPGA :lol:
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I'm also on the bridge, Captain.
Aye, aye!
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I have found no program for the AMIGA that use CHK or MOVEP Instructions.
It seems Days of Thunder uses the CHK instruction: http://eab.abime.net/showthread.php?t=1144
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I need a bigger FPGA
DE1 Board? ;-)
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@Dennis:
What do you think Minimig2 should contain?
(btw, do you happen to have the appropiate *.ut and *.xst files for Minimig?)
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TobiFlex wrote:
Do you know a .ADF Source from the hardwired demo?
http://www.filefactory.com/file/8bef63/
FYI: you can convert DMS to ADF using the xDMS tool
http://zakalwe.fi/~shd/foss/xdms/
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Thank you tobyflex!
*snoopy dance*
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How much are the DE1 boards? I know that I would be willing to pitch in to get one for Dennis so that the two of you could continue with the collaboration work you have been doing. If they are not outrageous in price, we could probably get one paid for in donations.
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Ok, I just looked it up. Is this the correct board?
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=83
If so, it is only $150. If you (Dennis) and TobiFlex think this is the correct way to go for the MiniMig v2.0, please PM me.
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Ok, I just looked it up. Is this the correct board?
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=83
Yes thats right. This is the same Board as this:
http://www.altera.com/products/devkits/altera/kit-cyc2-2C20N.html (http://www.altera.com/products/devkits/altera/kit-cyc2-2C20N.html)
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:bow: Very impressive - you make the day!
:cheers:
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TobiFlex, you are awesome. Well done matey. :-D
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Great job, fantastic work you are doing!
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Awesome stuff. In the long run this will make the Minimig even more accessible and functional, which is great stuff!
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Cool. You have mentioned that this is the board you would like to port to from the DE-2. Have you already done this? Do you have a DE-1 to port it to?
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Do you have a DE-1 to port it to?
Yes i have it done. But I am not satisfied yet.
I think i have a bug into the Floppycontroller.
If I have fix it I will release all the Source Code to.
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TobiFlex wrote:
I have found no program for the AMIGA that use CHK or MOVEP Instructions.
Some demos are using MOVEP as it allows you to implement blazingly fast blitter-C2P. I'm also using it for that purpose at this very moment. It's a bit of a pain though, as one needs to implement a different codepath for 060.
Mikko.
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@Belial6:
Or you could use: http://www.xess.com/prod035.php3
Which have 2,5 times logic array of XC3S400. Should be enough for Minimig + MC68000. Builtin PS/2 port, VGA, RAM.
MMC interface, Sound etc.. can be added with some very simple circuit to the prototyping header.
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Congratulations ! It is an awesome job!
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The board you pointed to is over twice as expensive as the DE-1 board. No doubt it is a great board, and offers greater flexibility, but my interest was in getting TobiFlex and Dennis on a single platform that could be a realistic board for end users to purchase.
TobiFlex has already ported from the presumably more powerful DE-2 board to the DE-1 board with that in mind.
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It doesnt have enough bits going to the VGA port to do Amiga gfx.
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Sorry if this is a dupe but myprevious comment seems to have disapearred.
The DE1 board looks very cool, but I do have a few concerns.
1) The USB "blaster" port sounds like it's only an uplink to a host computer for programming the FPGA, not for using keyboards/mice/digital cameras/memory sticks/etc. on the DE1 system.
2) Sounds like there's only 1 PS/2 port for EITHER keyboard OR mouse, not both
3) The PS/2 port is off the side instead of along the back with the other connectors.
Maybe all this can be compensated for with something added on one of the IDE looking expansion headers.
And a question, is this thing a standard form-factor such as Mini-ITX to easily fit some case, or is it an oddball format that requires hacking a case? I'm OK with hacking a case, but it'd be awfully convenient if it just fit a standard one.
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You could always cut a board to allow screwing a smaller board into it. And then attach the larger board to the case.
If the VGA port is insufficient, there's always the possibility to add to the expansion header instead.
Xilinx have Linux development enviroment. And license is alright.
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1) I don't think that it is even worth worrying about USB at this time. In the future great, but today, it is not a concern.
2) I would leave the PS/2 port issue to TobiFlex. He says he has already ported the code to the DE-1, so I would assume that he has a keyboard/mouse solution.
3) The MiniMig 1.0/1.1 is also a non-standard board, so we have not lost anything.
Really it comes down to the fact that Dennis and TobyFlex have actually produced something. We can debate what we think would make a perfect design, but the DE-1 is cheap and available. It also has at least one person who has proven himself by actually delivering something behind it, and it already runs the MiniMig. I would rather have a working MiniMig in a DE-1 format than a hundred great ideas that are not being produced.
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Where can I donate? Dennis page doesn't have a paypal button and neither does the T68 page.
I'm sure you get your motivation from your love of the amiga, the technical challenge, satisfaction of mastering the bits'n'bytes and soldering, and our appreciation.
But I notice that you need FPGA boards, can we help? If 10 people gave $20 you'd both have those developer boards.
Give us a paypal button, and the ones who only can help out with some $$ will! :)
BTW, my wishlist for minimig features is a mile long. But most of all, I want someone to get it made in china - soon! ;)
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I would be willing to donate to help with development of the Minimig.
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@billt
"USB-Blaster" is altera's USB -> JTAG debugging device. I have two right next to me now.
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tonyyeb wrote:
I would be willing to donate to help with development of the Minimig.
An amazing cool and generous friend of mine has built and shipped me a MiniMig 1.1 for FREE! :-o
In light of this I would be willing to donate the full $150 for the dev. board to Dennis.
-(e)
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@BillT
2) Sounds like there's only 1 PS/2 port for EITHER keyboard OR mouse, not both
That's not a problem since you can use a splitter. My laptop just has one PS2 port but I can use simultaneously both keyboard&mouse.
edit: I mean external PS2 keyboard&mouse simultaneously, each one connected to the PS2 splitter, of course. AFAIK the splitter is just a cable without logic
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That's not a problem since you can use a splitter. My laptop just has one PS2 port but I can use simultaneously both keyboard&mouse.
I didn't know PS/2 ports could do that. Cool.
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billt wrote:
That's not a problem since you can use a splitter. My laptop just has one PS2 port but I can use simultaneously both keyboard&mouse.
I didn't know PS/2 ports could do that. Cool.
There are other cool things you can do with PS2's. I have a PS/2 all-in-one keyboard that has a touchpad mouse incorporated with it (those who saw me at AmiWest a few years back saw me with it). All runs down a single PS/2 line into the system.
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This is great progress. That's one less IC that needs to be soldered in.
Hans
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Hans_ wrote:
This is great progress. That's one less IC that needs to be soldered in.
Hardly, you need to reread Dennis's post (http://www.amiga.org/forums/showthread.php?t=32854) I think the results show that the TG68 takes up about 70% of the MiniMig v1.x FPGA, leaving no room for MiniMig :-(
I am sure TobiFlex could get the size of the TG68 down abit with some good constraints and if he made some of the instructions multi-cycle.
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But FPGAs are only going to get bigger! It won't be long before both prpjects can be combined :-)
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Hardly, you need to reread Dennis's post I think the results show that the TG68 takes up about 70% of the MiniMig v1.x FPGA, leaving no room for MiniMig
I don't think this is an issue.
Anyone building a Minimig v1.1 will be using a physical 68000 anyway. In fact I think there will be always a demand for the 68000 based minimig going from v1.1 on. I own a v1.1 and I also intend to build an altera version.
More to the point, it would be good to take all the necessary elements from the DE2 and the additional requirements (I/O, video etc) and come up with a schematic/PCB layout for a dedicated Altera minimig board. Minimig v1.0a ? With no 68000 required and cheap memory this could be an interesting platform. :-)
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Crumb wrote:
That's not a problem since you can use a splitter. My laptop just has one PS2 port but I can use simultaneously both keyboard&mouse.
Only PS/2 ports designed to do exactly that are compatible with splitter cables, mostly on laptops: Wikipedia:PS/2 (http://en.wikipedia.org/wiki/PS/2_connector)
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alexh wrote:
Hans_ wrote:
This is great progress. That's one less IC that needs to be soldered in.
Hardly, you need to reread Dennis's post (http://www.amiga.org/forums/showthread.php?t=32854) I think the results show that the TG68 takes up about 70% of the MiniMig v1.x FPGA, leaving no room for MiniMig :-(
I am sure TobiFlex could get the size of the TG68 down abit with some good constraints and if he made some of the instructions multi-cycle.
And you need to buy a bigger FPGA and design a new board. ;-)
Hans
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Hans_ wrote:
And you need to buy a bigger FPGA and design a new board. ;-)
Hans
I thought the big advantage of this effort is that you don't have to build [color=ff0000]any[/color] board, you can use a stock Altera or Xilinx dev board. Granted, more stuff needs to be done to the Xilinx board - more bits to the RGB, and an SD card interface. But it still seems to make more financial sense than a custom board, unless you have the skills & tools to do it yourself.
BTW, Futurlec has a miniboard with a SD card reader interfaced by SPI.
-Jim
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freqmax wrote:
@Belial6:
Or you could use: http://www.xess.com/prod035.php3
Which have 2,5 times logic array of XC3S400. Should be enough for Minimig + MC68000. Builtin PS/2 port, VGA, RAM.
MMC interface, Sound etc.. can be added with some very simple circuit to the prototyping header.
That looks like a very cool prototyping board and components. Is it really true that it has insufficient lines going to the VGA port for Amiga graphics or did I skim this thread too quickly and misunderstand the comments?
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@TobiFlex
Is your fpga 680x0 using a barrel shifter for shifts and rotates?
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Great news Tobiflex, congratulations and thank you!
Dennis wrote:
Excellent news!!
This opens up some whole new possibilities...
(pondering about Minimig rev2.0 :-D )
What a great bit of other news to see that the famous Dennis van Weeren himself is still thinking of Minimig rev2.0 and has not gone on to other unrelated (non-Amiga) projects.
I know Tobiflex has said it would be difficult to move from 68000 to 68020 and above, but I hope that it does not prove to be so difficult that it is not attempted by someone, or another solution is found to lead the Minimig version path up to and beyond all Classic Amigas performance eventually, without breaking backward compatibility. Perhaps the future versions of the Minimig will even be more compatible at running old AND newer Amiga software than real Classic Amigas?
Very exciting times in the long history of the Amiga!
Dennis, Tobias, ........... Never Give UP! Never Surrender!
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I'm not sure what all of the debate is about. TobiFlex says that he already has MiniMig running on a DE-1 board. Earlier in this thread, he said it works, but he has a few tweaks that still need to be worked out.
I and one other user at least have offered buy Dennis a DE-1 board so that Dennis and TobiFlex can work from a common platform. If Dennis responds back telling me that the DE-1 will not work, I will withdraw my offer. If he says that it will work, and accepts the offer, I will buy a board that will be shipped to him.
No matter how much the rest of you argue about what the best board for the project is, only two people have really produced anything that would qualify them as proven experts. One of the two (TobiFlex) has already stated his endorsement of the DE-1 board, which is inexpensive, and we have not heard from the other.
Now, I don't want to discourage any of you from proving your expertise by porting to an even better board with greater capabilities, but until the time that Dennis comes forward and says that TobiFlex is our of his mind, I am going to take TobiFlex at his word that the DE-1 is up to the job. Even if he does, I will wait and see if TobiFlex could prove him wrong.
I don't think there is anyone out there that will complain if they can buy a professionally produced MiniMig for $150.
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@Belial
Just so you know: from what I can tell, the DE1 needs some add-ons, so the cost will be more than $150.00. So don't be shocked when the final cost comes in. Good luck. :-)
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@amigadave:
The board doesn't have lines to display *all* colours of the Amiga. Ie max 512 colours.
But this doesn't prevent it from running minimig. And should more fance colouring scheme be desired. One can always add something on the prototyping header. With throughhole stuff (easier).
The important thing is that it has onboard RAM (32M) and that now when the cpu + custom circuits can all be done in HDL. All the messy SMD soldering can be done away with.
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@ChaosLord
Instead of guessing, why not just ask TobiFlex? He has already ported MiniMig to the DE-1.
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freqmax wrote:
@amigadave:
The board doesn't have lines to display *all* colours of the Amiga. Ie max 512 colours.
But this doesn't prevent it from running minimig. And should more fance colouring scheme be desired. One can always add something on the prototyping header. With throughhole stuff (easier).
The important thing is that it has onboard RAM (32M) and that now when the cpu + custom circuits can all be done in HDL. All the messy SMD soldering can be done away with.
512 colours (or as we would write over here, colors)? I don't understand that limit, but most Amiga software only requires 16 or 32 colors and productivity usually will work fine with only 4 colors. The onboard 32mb RAM and extra capacity of the FGPA, plus all the other features makes it seem like a good candidate for Minimig v1.2 without having to solder anything. That plus the added advantage of the expansion connections could lead to more development and addons.
I wonder if Dennis and Tobias have looked at it?
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@AmigaDave
TobiFlex has stated earlier in this thread that he has already ported MiniMig to the DE-1 and is just tweaking a few things before releasing it. He also suggested that Dennis work on this board.
This is why I don't get what the debate is about. Everyone arguing against this board are not arguing that the effort should be put somewhere else. The effort has already been done by TobiFlex. They are arguing that TobiFlex should just not release the code because they think a different, and generally WAY more expensive board would be better. It makes no sense.
The other point that they are arguing is that Dennis should not be working on a common platform as TobiFlex, as both sweetlilmre and I have each offered to individually pay for the entire cost of a DE-1 board for Dennis.
I truly do not understand where these people are coming from. Maybe they are just so used to not having access to new hardware, that they don't know how to deal with it. Maybe they are worried that they will lose that little thing that makes them special if just anybody can buy Amiga compatible hardware.
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I wonder if Dennis and Tobias have looked at it?
Yes I have. But I can not seen a advantage.
The other point: I love Quartus - The Altera FPGA Design Software - especial the integrated Logic Analyser "SignalTap II". He is also included into the Web Edition. I have found many Bugs with the help of "SignalTap II".
@ ChaosLord
Is your fpga 680x0 using a barrel shifter for shifts and rotates?
Use a real 68000 a barrel shifter?
NO!
So I also not use a barrel shifter in my Core.
@alexh
I am sure TobiFlex could get the size of the TG68 down abit with some good constraints and if he made some of the instructions multi-cycle.
I will not optimize the size next time.
I will only optimize the function and speed next time and I think I need more LCs for the optimized Design.
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TobiFlex wrote:
I will not optimize the size next time.
I will only optimize the function and speed next time and I think I need more LCs for the optimized Design.
As Jens Schoenfeld of Clone-A said (and from experience I agree) when reverse engineering, the more you improve compatibility the smaller the design sometimes gets. You start to get closer to the original design which was inherently smaller.
Good luck and as soon as I get a board I'll help out a bit. Come on Crom!
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I should use a "one hot State Machine" for the signal "microaddr". This could bee an effect.
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Hi,
The first update for the TG68 Core:
Open Source 68000 IP Core (http://www.opencores.org/projects.cgi/web/tg68/overview)
I have added the MOVEP Instruction and found a Bug in MOVEQ. If MOVEQ was interrupted the data never stored into the Register.
Now is the Floppy Emu also stable. It was the CPU Core Bug!
Now I can compile stable versions for the DE1 and DE2 Board :-)
The CHK Instruction is not so difficult - but I must make some changes into the Trap system and this IS difficult :-(
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This is all very exciting and obvioulsy the work done is fantastic.... but can someone explain why a simpleton like me who just wants a Minimig and future Minimig developments to continue... should be getting excited?
Thanks in advance
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tonyyeb wrote:
can someone explain why a simpleton like me who just wants a Minimig and future Minimig developments to continue... should be getting excited?
If you have a MiniMig v1.x board you dont care.
If are a potential MiniMig v1.x owner, but cannot find one cos no one makes them, and were considering getting buying one of the slightly expensive off the shelf Altera DE1 or DE2 boards then you are wetting your pants as a more compatible DEx-MiniMig is on it's way.
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but can someone explain why a simpleton like me who just wants a Minimig and future Minimig developments to continue... should be getting excited?
This minimig version will also share custom chip emulation with MiniMig v1.x.
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alexh wrote:
If you have a MiniMig v1.x board you dont care.
If are a potential MiniMig v1.x owner, but cannot find one cos no one makes them, and were considering getting buying one of the slightly expensive off the shelf Altera DE1 or DE2 boards then you are wetting your pants as a more compatible DEx-MiniMig is on it's way.
So what will be the future? I buy a dev board and then i can download new code and use Amiga software on it?
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tonyyeb wrote:
alexh wrote:
If you have a MiniMig v1.x board you dont care.
If are a potential MiniMig v1.x owner, but cannot find one cos no one makes them, and were considering getting buying one of the slightly expensive off the shelf Altera DE1 or DE2 boards then you are wetting your pants as a more compatible DEx-MiniMig is on it's way.
So what will be the future? I buy a dev board and then i can download new code and use Amiga software on it?
Right
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@Belial6,
Thanks for the reply, but from what I have read so far, it did not appear to me that Dennis and Tobiflex are arguing.
My understanding is that the DE1 board just barely is capable of running Minimig v1.1 and has no capacity for improvements which is where many others, including Dennis want to go (v2.0 and beyond). Maybe I am wrong and have misunderstood some of the previous messages that I read too quickly, but I am pretty sure that Dennis is interested in v2.0 and less interested in just porting v1.1 to other boards.
In any case, I still like freqmax's suggested board, but have not checked on what it cost, I'll go back and look it up and try checking for pricing? Perhaps someone besides Tobiflex or Dennis will take enough interest in it to try to port the Minimig code, open core 68000 code and some other enhancements to it in the near future.
@Tonyeb, that is what is so exciting about the work being done on the Minimig project. It has "legs" and anyone with the skill and desire can take what has already been done by Dennis and Tobias and "RUN" with it to create a bigger and better project.
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I did not mean to imply that Dennis and Tobiflex are arguing. Tobiflex suggested the DE-1 board to Dennis. As far as I know, Dennis has not stated his opinion on the DE-1 board one way or the other. I do know that he has not responded one way or the other to my PM with an offer to just buy one for him.
It is other people that have argued that the DE-1 was unsuitable for the MiniMig.
Unfortunately, it looks like the DE-1 code is just that. Code. I am eagerly waiting for someone to compile everything so that I can download a zip file that can be unzipped to an SD card that I have put my own kickstart images on, and boot on the DE-1. As soon that is available, I will order a DE-1 board for myself.
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freqmax wrote:(edited)
Or you could use: http://www.xess.com/prod035.php3
1 million gate FPGA plus all the features below for $199
Features:
* XC3S1000 FPGA
* XC9572XL CPLD
* 32 MByte SDRAM
* 2 MByte Flash
* 100 MHz oscillator
* Parallel port
* Keyboard/mouse PS/2 port
* 512-color VGA port
* 7-segment LED
* 2 pushbuttons
* 4 DIP switches
* 84-pin prototyping interface (65 free I/O pins)
* 5V DC power jack
* 5V / 3.3V / 2.5V / 1.2V regulators
* Downloading cable
* XSTOOLs CD
* Works with XILINX ISE, WebPACK, iMPACT and ChipScope software
* Requires Win2K or WinXP. Not supported by Win98 or WinME!
Looks very tempting to me at that price. I hope someone attempts to get the Minimig running on it and an open core soft 68020+ is created to put in it. (I wonder how long it would take me to learn Verilog and VDHL?) :lol: (probably pretty long since it is VHDL, not VDHL)
Oh, and don't forget this is included too!
Documentation:
* XSA-3S1000 Board Manual (PDF file)
* XSA-3S1000 Board Pin List (Excel file)
And these are available:
Accessories:
* XSUSB USB interface
* XStend Board 3.0
* 5 VDC power supply (North America)
* 5 VDC power supply (Europe)
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There's also this alternative:
http://www.enterpoint.co.uk/moelbryn/darnaw1.html
(140 USD, 110 EUR)
Then add a through hole accessory board with:
* Video out (VGA/SCART)
* Audio
* Joystick
* Flashmemory card
* Keyboard (PS/2)
* RS232
* +5V and +3,3V regulators
And it will do the same as a Minimig1 provided the softcpu and sdram interface is up to the task.
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@freqmax,
I liked your first suggestion much better, and for an A1200 like Minimig, the 32mb RAM should be plenty. I am sure it is going to take a huge amount of developing effort to get from v1.1 OCS to v3.x AGA w/68020+ soft CPU. Perhaps as much, or more than Dennis had to put into the whole of his design? It would be great if a small team of programmers would take it on and speed its completion. A Minimig that is equivalent to an 030/50mHz A1200 in a small form factor and at a cost of $300 to $450 would be quite an accomplishment.
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amigadave wrote:
@freqmax,
I liked your first suggestion much better, and for an A1200 like Minimig, the 32mb RAM should be plenty. I am sure it is going to take a huge amount of developing effort to get from v1.1 OCS to v3.x AGA w/68020+ soft CPU. Perhaps as much, or more than Dennis had to put into the whole of his design? It would be great if a small team of programmers would take it on and speed its completion. A Minimig that is equivalent to an 030/50mHz A1200 in a small form factor and at a cost of $300 to $450 would be quite an accomplishment.
The FPGA you'd need to fit the 68020 + AGA would run you approx $300 on it's own. Add in the other parts, you'd likely be nearing $1000.
Give it a few years. We need to hit ECS before we go AGA, and by that time, prices/density should have come down. Heck, the chip density used in MiniMig 1.0 would have cost almost $1000 not even 3 years ago IIRC.
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downix wrote:
amigadave wrote:
@freqmax,
I liked your first suggestion much better, and for an A1200 like Minimig, the 32mb RAM should be plenty. I am sure it is going to take a huge amount of developing effort to get from v1.1 OCS to v3.x AGA w/68020+ soft CPU. Perhaps as much, or more than Dennis had to put into the whole of his design? It would be great if a small team of programmers would take it on and speed its completion. A Minimig that is equivalent to an 030/50mHz A1200 in a small form factor and at a cost of $300 to $450 would be quite an accomplishment.
The FPGA you'd need to fit the 68020 + AGA would run you approx $300 on it's own. Add in the other parts, you'd likely be nearing $1000.
Give it a few years. We need to hit ECS before we go AGA, and by that time, prices/density should have come down. Heck, the chip density used in MiniMig 1.0 would have cost almost $1000 not even 3 years ago IIRC.
I am actually starting this kind of development.
My ultimate goal is to use a Stratix II dev board to create an accelerated AGA Amiga.
Here are the characteristics:
- 32 MB of NOR flash (have already replaced the 16 MB chip by a 32 MB one) -> it will contain the kickstarts and the workbench flash disk.
- 32 MB of DDR SDRAM (64 MB planned) -> it will be the fast RAM
- 2 MB of SSRAM (8MB planned) -> it will be the chip RAM
- Planned (chip and fast) bus speed : 114.5 MHz.
- 100Mb Ethernet
- IDE port
- Stratix 2S60 (3 million gate chip)
- VGA, S-Video, Joy ports, parallel, floppy and keyboard will be on a Santa Cruz daughter board
I want to mount the dev board into an A1200 case with a slim DVD-ROM drive and a compact flash drive.
That will be my dream Amiga :-D
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The Stratix II development board sounds like a nice idea; however, it is really expensive right now ($2K to $3K) unless you have access to one via work or school. Affordable FPGA evaluation boards today, would be Altera Cyclone II/III or Xilinx Spartan 3e.
:-)
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@downix,
Not being as tech savvy as you, I have no idea how many gates the FPGA would need to do the AGA Minimig code plus a softcore 68020+ and thought the 1 million gates could maybe do it.
The price of $199 for the 1 million gates plus all the other features seems like a very good price and it has expansion capabilities which could perhaps contain either the 68020+ in another FPGA, or the AGA, or better display device code. I just thought that for the price, there was a lot going for the XSA-3S1000 Spartan 3 Prototyping Board and since price is a big consideration for many wanting a Minimig, the XSA-3S1000 was worth looking at a little closer by someone with the capability to produce something.
So, I brought it up a few times just in case it would help point it out to the right people.
Oh, and I totally agree that ECS needs to be next and you are right that we must walk before we can run. I know that AGA and/or 68020+ will likely be a year or more into the future.
@FrenchShark,
Sounds like a great plan, are you going to be working alone, or with others to make it a reality? The reason I ask is that I hope that the huge effort to create AGA and/or 68020+ softcore code is at least done in cooperation and not several individuals working on the same thing at the same time and having it take many times as long to complete as it would if they work together.
@Dennis,
See what you have started! My congratulations to you again sir. You have done more for the Amiga community than any single person since Jay Miner. :bow:
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jkonstan wrote:
The Stratix II development board sounds like a nice idea; however, it is really expensive right now ($2K to $3K) unless you have access to one via work or school. Affordable FPGA evaluation boards today, would be Altera Cyclone II/III or Xilinx Spartan 3e.
:-)
My point about cost and the XSA-3S1000.
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I would recommend a similar approach on starting to get on route to an A1200 level of a MiniMig 2.0 by use of a larger FPGA, SDRAM, and an external 68020 CPU (need CBT level shifters) since it is going to take some work to get that really nice soft VHDL 68K core upgraded to 68020 level (Icache, pipline etc ...) and to get AGA graphics.
:-)
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For development purposes a real MC68020 plus 5V<->3.3V interface would be useful. Since you can then run the softcore "68020" and the real thing in parallel executing the same instructions.
Then trigger points within the code can catch any anomalities. And the transactions causeing it can be logged.
Also what benefits does 68060 have over 68020 that really makes a practical difference from a functional view?, as the ballgame becomes different when you can do things in HDL.
Is there anyone that could make a realistic estimate of the FPGA capacity needed for AGA ..? (diesize x nm process), to nail weather it's feasable or have to be postponed for years until logic capacity goes down in price.
I did an rough estimate in Oct-2005 on the number of gates in the Amiga using the pictures of Lorraine#1 (http://dickestel.com/images/vintage10.jpg) #2 (http://www.amigau.com/aig/concept/lorraineconcept3.jpg). By using the average number of gates in 74xx logic chips say 60 gates x 30 rows x 5 columns x 15 boards = 135000 gates.
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freqmax wrote:
Also what benefits does 68060 have over 68020 that really makes a practical difference from a functional view?, as the ballgame becomes different when you can do things in HDL.
68060 has 8k data cache
68020 has 0k data cache
68060 has 8k instruction cache
68020 has 0.25k instruction cache
68060 can execute 2 instructions simultaneously (3 if you count predicted branches)
68020 can execute only 1 instruction at a time
68060 has many floating point instructions
68020 has no floating point instructions
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So, from the software running on the machines point of view, the only difference is that the 68060 has floating point?
-
Guess the 2 instructions in parallel can be achived with some instruction decode pipeline?
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So, from the software running on the machines point of view, the only difference is that the 68060 has floating point?
And an integrated memory management unit. Plus a superscalar architecture (though not pipelined, if Wikipedia is to be believed). The latter is not much of a problem since there never were any official Amigas coming from the main manufacturer with a 68060 installed, and it's just a means of speeding up execution rather than implementing a different set of mnemonics.
Personally, I think that if a more advanced make of CPU were to be coded into a FPGA, then it should be the one with the most informative exception handler stack frame (I vaguely recall that this began with the 68030, which could be made to recover from nearly everything you threw at it). A full implementation of the 68882 would be useful; I don't think the full 68851 is required and one can make do with the MMU-subset found in the 68030 and 68040. From the looks of the software-68000, it shouldn't be much work nor take much extra gates adding the instructions and abilities of a plain 68030 given that almost nothing changed in the register model save for the addition of proper support for longwords.
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freqmax wrote:
Guess the 2 instructions in parallel can be achived with some instruction decode pipeline?
Or multiple execution units. The question is: why would you want to? It's an addition to increase performance on the original chip, not to increase its capabilities. The FPGA'd 680x0 relies on a completely different model to increase its performance, and modelling the performance enhancements of the original chips is not guaranteed to work for the FPGA-equivalent. I know very little of FPGA-programming, so I'm not even sure a standard trick as introducing a cache will work. One would say it would, true. But it's the nature of the FPGA which determines what will work and what will not, and I'll leave that to the actual coders to sort out the details.
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Cymric wrote:
From the looks of the software-68000, it shouldn't be much work nor take much extra gates adding the instructions and abilities of a plain 68030 given that almost nothing changed in the register model save for the addition of proper support for longwords.
Not singling you out specifically, but this has a bit in it that is driving me a bit nutty. A lot of people keep calling this a software CPU. No, it's an HDL CPU, that is it's a description of hardware. While it can be run as software, it's end goal is to be hardware. So please, let's just call it the TG68000?
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jkonstan wrote:
The Stratix II development board sounds like a nice idea; however, it is really expensive right now ($2K to $3K) unless you have access to one via work or school. Affordable FPGA evaluation boards today, would be Altera Cyclone II/III or Xilinx Spartan 3e.
:-)
The Nios II boards cost $1000. And only $400 WITHOUT the software (the software is a 1 year licence for Quartus II full version).
The Stratix FPGA are not supported by the Web edition so if you do not have access to a full version of Quartus II, you are limited to the Nios II Cyclone II board or the new E.E.K. Cyclone III.
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amigadave wrote:
Sounds like a great plan, are you going to be working alone, or with others to make it a reality? The reason I ask is that I hope that the huge effort to create AGA and/or 68020+ softcore code is at least done in cooperation and not several individuals working on the same thing at the same time and having it take many times as long to complete as it would if they work together.
I will work alone but of course, I will re-use the nice designs from Dennis and Tobias.
Currently, I am working on a RISC CPU that has the same ALU than a 68000 so I can easily emulate a 68000 with it.
It has a 4-stage pipeline. The Fetch, Decode and Execute stages are almost finished. I am fixing the bugs right now. I need to write the Load/Store unit. The Fmax given by Quartus is 125 MHz.
With a software emulation layer I think I can achieve 5-10 MIPS, if I use some HW acceleration, I can get 10-20 MIPS and maybe with a full HW translator, I can get 100 MIPS.
Even if I do not use it for the main CPU, it can make a nice coprocessor (a la Jaguar) for the audio and video. :-P
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downix wrote:
Not singling you out specifically, but this has a bit in it that is driving me a bit nutty. A lot of people keep calling this a software CPU. No, it's an HDL CPU, that is it's a description of hardware. While it can be run as software, it's end goal is to be hardware. So please, let's just call it the TG68000?
You are correct in that I get my terminology mixed up, and I shouldn't be doing that. For the record, I know that it isn't a genuine 'software' CPU in the ASIC sense.
However, thinking of the HDL CPU as a genuine software CPU when coupled with advanced Minimigs does aid people in showing why it isn't important to implement the full superscalar, cache rich, branch predicting core of a 68060. Even a 68020 isn't particularly useful.
-
Okay, forgive my ignorance, and note that I'm not trying to be critical. But, would not 'firmware' be more appropriate than 'software' or 'hardware'?
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One could call it configuration file, design file, HDL files etc..
Regarding 68020, is it mainly the 32bit capability that is needed/wanted from a 68000->68020 upgrade?
In such case maybe a hybrid solution where the HDL 68000 is made 32-bit capable is an easier and faster approach to accomplish any 68020 needs?
Other factors are ofcourse FPU, and MMU. I know MMU is used by unix operating systems. But for anything else are these things really used in the Amiga enviroment?
Trying to find a less burdensome upgrade path.
I also think any software emulate cpu will just like UAE have problems with latency.
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freqmax wrote:
Regarding 68020, is it mainly the 32bit capability that is needed/wanted from a 68000->68020 upgrade?
In such case maybe a hybrid solution where the HDL 68000 is made 32-bit capable is an easier and faster approach to accomplish any 68020 needs?
You cannot make a 68000 32-bit without turning it into a 68020; there's portability issues to consider. And the difference between a 68020 and 68030 is very small. Since the latter has a more informative stack frame upon handling of exceptions, I'd be in favour of doing a 68030 instead of a 68020.
Other factors are ofcourse FPU, and MMU. I know MMU is used by unix operating systems. But for anything else are these things really used in the Amiga enviroment?
They are used in program development in order to catch badly behaving programs. I've experienced enough crashes on my EC030 to know I would want its functionality, even if it isn't supported by the OS.
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One thing I was pondering was in rolling this into a spare FPGA I have, and pairing it next to an original 60000, to duplicate instructions and see what differences there are. Just need to find a minimalistic motherboard design for the 68k, like the old Altair, so I can directly manipulate them.
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I just thought I would let people know that I am working on an improved boot loader based on the Minimig one.
The aim is to extend the excellent work done by Dennis and Tobiflex, so the Minimig can do more and also so a board like the Minimig board can be made to run more cores.
The one thing I plan to add if I ever get it going is Ethernet to the Minimig.
I think Tobiflex has worked on a Amstrad CPC core in the past and there are many other cores out there that can benefit from been run on a board like the Minimig one.
I am no expert FPGA coder at this time so I would have to get Tobiflex's core running on one of my two Xilinx based boards.
I notice Tobiflex's is running on Altera based boards at the moment. I hope I can get hold of the HDL and get it ported to my boards. I may be able to get that done.
I would really like to try anyway.
You can see what I have been up to on my website here :-
http://minimorph.com/forum/viewforum.php?f=42
I have non of this working at this point. I am actually still waiting for a Dev kit to arrive for my chosen Micro controller hardware platform.
The one bit of good news is that the tool chain I am using is totally open source and free to download, unlike the Hitech tool chain used on the current Minimig boot loader.
I plan to put the code up on Source Forge on maybe Open Cores when I have it working.
What do you all think ?
Feedback welcome.
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You can make it run more cores this way:
1) A coreselector is loaded and run just like "minimig1.bit" is now. Once this is running it will put up a fileselector. And any selected core will have it's filename written to a eeprom area in the PIC18.
2) The PIC18 will reset the FPGA by playing with the PROG, INIT_B etc.. signals. And load the core again, but now using the filename selected in eeprom.
So a two-stage loader could make it happen with current pcb layout.
The default action if no bitfile is selected is to start the "last one selected" within 5s or such.
One could also use a small file on the flashmemory for bitfile selection. Maybe that would be a more portable idea.
Regarding ethernet. What you will need is a PHY. And you will need to wire up RX_Clock, RX_Datavalid, RX_Error, RX_Data[3:0], TX_Clock, TX_Enable, TX_Error, TX_Data[3:0].
For 1 Gigabit mode an additional 4 more databits will be needed per direction (GMII). Possible you may need MCLK and MDATA to configure the PHY aswell, but the defaults seems alright. A minimal setup will be 12 IOs and a full at least 16 IOs.
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Hi freqmax,
You have exactly the same idea as I have of running more cores on a FPGA board and how to achieve that.
The current PIC18 series code would need modifications to make it suitable for running more cores and that is just what I am working on.
The MiniMig board is not ideal for running other cores however. The on board 68000 is not much use if your core needs a 8086 or a Z80 !
The FPGA on the Minimig may be too small to run some more complex cores.
The Minimig board should be great however for emulating things like the Atari ST, Mac Classic and Sinclair QL.
It should easily be able to run older computers like the C64 and Spectrum.
Tobiflex's new version with a 68000 in the FPGA is much more suitable for running other cores.
I think Gigabit on an Amiga class of computer would be a waste of time. It would never be able to keep up with the data.
The new Micro controller I am developing for my version of the boot loader has Ethernet built in, so no extra PHY is not required. This will add an Ethernet Capability to both the Boot Loader and the FPGA and use no extra FPGA pins. It will also allow the boot loader to retarget classic ports such as RS232 and Parallel ports over the Ethernet.
The chip is also much more capable than the 18 s series PIC, so more suited to a board that can run many cores.
Lastly the tool chain I am using is Open Source and Free to download, which I think is important for an Open Source community project.
All the best.
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freqmax wrote:
Regarding ethernet. What you will need is a PHY.
It looks like the microcontroller MiniMorph is proposing we use already handles the physical layer of the ethernet connection for us.
@Minimorph
First of all, thank you for taking on this project, the possibilities unlocked using an improved bootloader and ethernet+USB connections are great.
I would like to ask you a few questions.
1. As the LM3S6965 chip and FPGA would both be reprogrammable through the JTAG port, could we configure the LM3S6965 to act as a co-processor at runtime? Not sure why we would do this, just wanted to know if it would be possible.
2. LM3S6965 adds USB and Ethernet connectors to the Minimig. How easily can these be used for outgoing comms if Minimig code was amended to think they are serial port connectors?
3. Does the microSD slot support SDHC cards?
4. Price issue. So that I had some understanding of the added cost, I went onto Digikey's website. For the Microcontroller itself, we're talking around $13.10 USD:
Link (http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=726-1081-ND)
The evaluation board is around $69.00 USD:
Link (http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2621773;keywords=%20LM3S6965)
Other than the LCD screen and speaker (neither of which I see as essential, especially as the new bootloader would handle selecting the cores), would we lose any features by incorporating the microcontroller, microSD slot, ethernet port, JTAG port and USB port directly into the Minimig PCB design?
5. Last question relates to the bootloader. It seems to me that you are looking to replace the PIC with the LM3S6965 rather than having both devices on the board. I noticed that you plan on using ZIP files to hold the FPGA core data. Would the PIC chip used in Minimig 1.1 be powerful enough to do the unzipping? Just want to make sure Minimig 1.1 owners get access to the new cores.
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To answer your questions.
1) Yes, sure the Luminary chip could be used a a co-processor. I was really planning on making the Luminary chip emulate things like Tape Drives, Floppys & Hard Drives and then also to hook the legacy ports to Ethernet. I think these tasks are best handled in software and as the boot loader would provide it capabilities to all cores it. The sort of thing that would be possible is downloading a program directly into your core from the internet.
2) The Luminary chip has no USB, that is provided by an ftdp chip that acts as a JTAG Interface and USB to serial port converter at the same time. It should be pretty easy to get Ethernet communications through the Luminary chip from the FPGA core. Simpler than emulating hard disks and the like. I anticipate using UDP, TCP/IP, TFTP and FTP communications. HTTP stuff is also possible but I do not see what you could do with that.
3) I am no expert of SDHC, if you can talk to an SDHC card using SPI then I guess it can be made to work. I will do more digging. I would think 2GB is quite a lot of software for an Amiga Classic ;).
4) I think $13 is pretty good for what it does. The evaluation board is also very good value. i just wish mine would turn up !! The tool chain is open source and free to download which is nice too.
The actual part I would use on a PCB would be the LM3S6918 Micro controller. I also plan to make use of the A/D converters and Real Time clock capability.
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Thanks for the reply MiniMorph, I'm sure I'll have more questions later as your project is an exciting development. Make sure you keep us posted with your progress.
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13 USD for another chip is a bit. Esp considering the FPGA is 25 USD..
I don't propose 1 Gbps for Minimig. But it might be easier to source those chips etc..
Because 10M ethernet can't be accomplished without external hw, and 10/100M chips are the slowest ones that exist. 10/100M is the best choice.
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freqmax wrote:
13 USD for another chip is a bit. Esp considering the FPGA is 25 USD..
Its not that much if it's replacing the PIC that costs £5.04 with a part that costs £6.80 (prices from Digikey uk).
Ok that does selectively ignore any additional components required for ethernet like the connection block etc.
Andy
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downix wrote:
One thing I was pondering was in rolling this into a spare FPGA I have, and pairing it next to an original 60000, to duplicate instructions and see what differences there are. Just need to find a minimalistic motherboard design for the 68k, like the old Altair, so I can directly manipulate them.
Didn't see this before.
Have you tried doing this?
Andy
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AJCopland wrote:
downix wrote:
One thing I was pondering was in rolling this into a spare FPGA I have, and pairing it next to an original 60000, to duplicate instructions and see what differences there are. Just need to find a minimalistic motherboard design for the 68k, like the old Altair, so I can directly manipulate them.
Didn't see this before.
Have you tried doing this?
Andy
Not yet, I cannot find any good documentation on how the front panel was programmed, so I'm having to recreate it by hand.
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What do you mean by frontpanel..?
Can't you use the FPGA to manipulate the m68k ..?
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freqmax wrote:
What do you mean by frontpanel..?
Can't you use the FPGA to manipulate the m68k ..?
And manipulate it, how, without a keyboard, mouse, or other method of input?
I am trying to mimick the "front-panel" input from the first PC, the Altair:
(http://www.applemonthly.com/altair.jpg)
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Cheers.
freqmax wrote:
13 USD for another chip is a bit. Esp considering the FPGA is 25 USD..
I don't propose 1 Gbps for Minimig. But it might be easier to source those chips etc..
Because 10M ethernet can't be accomplished without external hw, and 10/100M chips are the slowest ones that exist. 10/100M is the best choice.
13 USD is just the list price I would hope to get it cheaper than that. It is not that much money to add 10/100 Ethernet to the board along with all the rest it can do, like real time clock and A/D's.
If there were a Mini Morph 2 then I am guessing that the 68000 would be run in the FPGA itself and thus a more expensive than 25 USD FPGA would be required.
I am glad you approve of 10/100 Ethernet, I think it would be fine too, and with a 50MHz Cortex M3 processor to pick up the Ethernet it should fly !
I will continue with development of my Minimorph Bootloader. I let people know when I have it working in this forum if there is interest. In the meantime I will post my progress on my own site as mentioned above !
P.S. does anybody know where to buy Altera DE1 boards in the UK/ Europe ???????
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I just bought a DE2 from Terasic. (http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=39&No=)
They quoted 2 days shipping to the U.K. and they even take Paypal! :-)
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I have had a lot of trouble with parcelforce charging a nearly £20 handling fee for stuff from outside of the EC. I now try and order from Europe.
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@downix
Could you please scale down your pic.
We can't read the forum properly any more.
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All the projects using front panels that I have seen, used switches and leds connected to the address, data and control lines, there is nothing to program (in the front panel).
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Some Administrator, plz reisize or disable this huge picture..
@downix:
Ofcourse you can manipulate the m68k, simple connect to the jtag interface of fpga. Or even use any existing RS232. Or a planned 10/100M ethernet.
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I frequently use URLs that are too long in my posts, but I do know how to easily resize them. If downix or any other forum member is looking for an easy way to resize pictures they find online, check out this method:
1. Copy URL of image (right click->copy image location in Firefox).
2. Go to http://www.shrinkpictures.com/
3. On Resize Images form, click browse. In file open dialog, paste image URL, click on Open button.
4. Select resizing options, then click on Resize button.
5. Once image resized, you will have an option to host image at www.4freeimagehost.com. Click on the link. Use hosted image in forum post.
Here's the link to the resized Altair 8800 image I made:
http://www.4freeimagehost.com/show.php?i=PUSHdfc6b739ddc9.jpg
It has lost some of the cool detailing visible in the full size picture due to its smaller size (25% of original), which is a shame.
Hope that this post is useful.
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Maybe the Altair pic should be left in all it's glory.
Boy! Back in the day I would have loved one of those. :-)
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I would like to order a Altera DE1, but I hate those fees.
The fee would be the same if I order 5 DE1's as if I order 1 so that would save some cash.
Is there 4 more people in the UK or EC that would like a Altera DE1 I will order 5 and sell the other 4 on.
So are there 4 others who want a DE1 ????
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Ok, pt the resized one up, btw that free image host of yours stinks, useless for posting pictures into sites. So I put it on one of my own sites.
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I am waiting for the DE-A version with a proper Analog VGA port on it.
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downix wrote:
Ok, pt the resized one up, btw that free image host of yours stinks, useless for posting pictures into sites. So I put it on one of my own sites.
I've never used that image hosting site before today, I created the guide in a couple of minutes. I'm just glad you resized the picture. :-) :roll:
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amigadave wrote:
512 colours (or as we would write over here, colors)? I don't understand that limit, but most Amiga software only requires 16 or 32 colors and productivity usually will work fine with only 4 colors.
The Amiga OCS displays 16 or 32 colors out of a palette of 4096 colors. HAM mode can use all 4096 colors on a single picture.
That's because the OCS has 4 bits of final digital output on all 3 Red, Green and Blue channels. 3 x 4 =12 total bits to control the color of every individual pixels 2^12=4096.
The aforementioned board has bits numebered 0 to 2 on these 3 channels. 0 to 2 means 3 bits per channel 3x3=9 bits per pixel on the final output. and 2^9=512.
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freqmax wrote:
Other factors are ofcourse FPU, and MMU. I know MMU is used by unix operating systems. But for anything else are these things really used in the Amiga enviroment?
Mac emulation...
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eslapion wrote:
The aforementioned board has bits numebered 0 to 2 on these 3 channels. 0 to 2 means 3 bits per channel 3x3=9 bits per pixel on the final output. and 2^9=512
Thats not true! That was the color count for the XESS Board.
The DE1-Board use 4 Bits per Color = 3x4=12 bits per pixel and 2^12=4096. The DE1 Board has the same color count as the minimig!
The DE2-Board use 10 Bits per Color = 3x10=30 bits per pixel!
Viele Grüße
TobiFlex
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eslapion wrote:
amigadave wrote:
512 colours (or as we would write over here, colors)? I don't understand that limit, but most Amiga software only requires 16 or 32 colors and productivity usually will work fine with only 4 colors.
The Amiga OCS displays 16 or 32 colors out of a palette of 4096 colors. HAM mode can use all 4096 colors on a single picture.
That's because the OCS has 4 bits of final digital output on all 3 Red, Green and Blue channels. 3 x 4 =12 total bits to control the color of every individual pixels 2^12=4096.
The aforementioned board has bits numbered 0 to 2 on these 3 channels. 0 to 2 means 3 bits per channel 3x3=9 bits per pixel on the final output. and 2^9=512.
Yes, I know all about how the Amiga OCS uses a palette of 4096 colors and can display them all in Hold And Modify. What I had not done was the math using only 3 bitplanes to come up with the 512 color limit (I somehow thought it was a different number). Anyway, I wonder if the XSA-351000 Spartan 3 Proto-Typing board's 512 color palette would work for all other Amiga programs that don't use HAM mode. I don't know of any games that do (but there are probably a couple).
DCTV only uses 3 bitplanes per color and can output millions of colors to composite output and even has an RGB converter to display all those colors back in RGB mode. I would love to go down that route and have the capabilities of the DCTV reverse engineered into the Minimig, or to add a DCTV to the XSA-351000 board's expansion port somehow and have an Amiga display of millions of colors natively using only 3 bitplanes and such a low amount of display power it would be very fast.
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TobiFlex wrote:
Thats not true! That was the color count for the XESS Board.
My apologies, the "aforementioned" board in question was the Xess XSA-3S1000 and not the DE1.
The DE1 does support more color and the DE2, well, the DE2 is probably what commodore should have come up with after AGA if it hadn't died...
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amigadave wrote:
Yes, I know all about how the Amiga OCS uses a palette of 4096 colors and can display them all in Hold And Modify. What I had not done was the math using only 3 bitplanes to come up with the 512 color limit (I somehow thought it was a different number). Anyway, I wonder if the XSA-351000 Spartan 3 Proto-Typing board's 512 color palette would work for all other Amiga programs that don't use HAM mode. I don't know of any games that do (but there are probably a couple).
What could easily be done is to emulate the complete OCS or ECS internally and simply not output the LSB of each color channel. Simply connect bits 3-1 from each color channel of the virtual denise to color channels 2-0 of the VGA port.
What really gets my attention with the Xess board is that it is said to be able to carry up to 1Million gates. The DE2's cyclon II is said to be limited to around 68000 (hey nice number...) logic elements.
How does a "logic element" compare to a "gate". Is that the same thing? Can the Xess product really carry about 12 times more stuff than the Altera?
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@TobiFlex
I would love to help, and think the idea of the DE-1 is great. Unfortunately, I have no experience with coding for FPGAs. If I were to get one, is there any kind of testing I could do that would be helpful to you in your debugging.
The system still having bugs does not scare me. I have been happy with my C-One, and I paid more for that than the price of a DE-1 board.
If there is any testing I could do, and I could get the bitstream (?) files from you, let me know, and I will get a DE-1.
Thanks
-
@amigadave:
What do you mean by DCTV ..?
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freqmax wrote:
@amigadave:
What do you mean by DCTV ..?
He means this : http://www.amiga-hardware.com/showhardware.cgi?HARDID=282
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Is this an Altera DE1 :-
http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=544-1736-ND
Looks like it to me !!
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eslapion wrote:
What really gets my attention with the Xess board is that it is said to be able to carry up to 1Million gates. The DE2's cyclon II is said to be limited to around 68000 (hey nice number...) logic elements.
You can't compare Gates with logic elements. On the xilinx webside i found this:
XC3S1000 = 17280 LC's
XC3S1200E= 19512 LC's
On Alteras Webside I found this:
EP2C20 = 18752 LC's (the DE1 Board chip)
EP2C35 = 33216 LC's (the DE2 Board chip)
The Minimig Core on the the DE1 Board use 13708/18752 = 73% of the Logic elements. It include Dennis Minimig Core, my TG68 Core and my Spihost with Z80 Core.
The complet Core will fit into all this chips.
Minimorph wrote:
Is this an Altera DE1 :-
http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=544-1736-ND (http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=544-1736-ND)
Yes it is the DE1 Board!
Belial6 wrote:
If there is any testing I could do, and I could get the bitstream (?) files from you, let me know, and I will get a DE-1.
You can test Games and applikationen. If you like I send you the Bitstreamfiles.
Viele Grüße
TobiFlex
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The Minimig Core on the the DE1 Board use 13708/18752 = 73% of the Logic elements. It include Dennis Minimig Core, my TG68 Core and my Spihost with Z80 Core.
Out of curiousity, what's the "Spihost with Z80 Core" used for?
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MskoDestny wrote:
Out of curiousity, what's the "Spihost with Z80 Core" used for?
All what the PIC18 do on the Minmig do the DE1 with my spihost except the FPGA Config. I have take Dennis C-Code for the PIC and have it adapted for SDCC and the Z80.
So you don't need a PIC anymore.
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Why Z80 instead of 6502?
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ChaosLord wrote:
Why Z80 instead of 6502?
The Z80 was a better CPU than the 6502
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ChaosLord wrote:
Why Z80 instead of 6502?
Why not an open source one from opencores.org or some other? Probably familiarity and competance at using it :-D It hardly matters as long as the chip is capable of whatever its being asked to do which doesn't sound like a lot.
On the plus side, the MegaDrive (Genesis for the US) used a Z80 so it's nice to know that already a 68k + Z80 + OCS can fit into the single FPGA!
Andy
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bloodline wrote:
ChaosLord wrote:
Why Z80 instead of 6502?
The Z80 was a better CPU than the 6502
Oh no! Please don't discuss that here!
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Great work putting the PIC stuff into the FPGA Fabric.
This is great if all you want is a Minimig.
The Idea of the Minimorph Boot Loader is that I can load many different cores into the FPGA.
The ones I am planning for sure is :-
ZX81 (ZXGATE),
VIC20 (FPGA Arcade),
C64 (FPGA64) ,
Spectrum (ZXGATE),
Amstrad CPC by TobiFlex I belive ;)
Atari ST by Wolfgang Förster,
Amiga (Minimig)
This would make the project like the www.mess.org of the FPGA world :D
I think using a micro controller Boot loader is the easiest and best way of doing this.
I want to add one platform myself. I will not mention that until I make some progress !
It will be possible to "hand" the MicroSD card over to the FPGA after loading by pin sharing between the micro and FPGA. The Micro controller can offer "Services" to the FPGA, like Tape Emulation, Floppy Emulation, Hard Disk Emulation, Telnet, Serial to Ethernet Conversion, TFTP, FTP, TCP/IP and so on.
I know I can make all this work. In my professional life my work is 90% firmware.
The main thing my work will add to the Minimig is Ethernet.
I would like to order an Altera DE1, is this board OK for the Minimig ??
If you need help with the Z80 firmware I can help there let me know with a PM.
I will port my version of the Boot Loader to your embedded Z80 chip given the chance !
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AJCopland wrote:
Why not an open source one from opencores.org or some other? Probably familiarity and competance at using it :-D It hardly matters as long as the chip is capable of whatever its being asked to do which doesn't sound like a lot.
Andy
There is an open source Z80 compatible core on opencores.org.
http://www.opencores.org/projects.cgi/web/t80/overview
I kinda like the idea of the Z80, I had some experience with it myself, back in the Elder Days. ;-)
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@MiniMorph
The Altera DE-2 has a built-in Ethernet port and an AGA-compatible VGA port.
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TobiFlex wrote:
You can't compare Gates with logic elements. On the xilinx webside i found this:
XC3S1000 = 17280 LC's
XC3S1200E= 19512 LC's
On Alteras Webside I found this:
EP2C20 = 18752 LC's (the DE1 Board chip)
EP2C35 = 33216 LC's (the DE2 Board chip)
The Minimig Core on the the DE1 Board use 13708/18752 = 73% of the Logic elements. It include Dennis Minimig Core, my TG68 Core and my Spihost with Z80 Core.
The complet Core will fit into all this chips.
Thank you for this explanation.
I suppose then, the Virtex 5 family with up to 330'000 LCs must be a monster comparatively then.
However, I failed to find a development and/or educational board that uses such a large capacity chip.
Also, the DE1 will unlikely support an AGA core if it already takes 73% of available LCs to put in the OCS one. The DE1 also does not support the number of colors displayable by AGA.
Given the choice, I would prefer to use the DE2 to allow for future developments.
-
@MiniMorph:
We'r missing Macintosh 68k, and Sun-3 :-D
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I think Tobiflex will release cores for both the DE1 and the DE2, so you can choose the have the 150 USD DE1 or the 499 USD DE2. I am pretty sure any core that will run on the DE1 can be easily ported to the DE2.
My Boot Loader would be the same for both anyway. In fact I expect my Boot Loader could be used on pretty much any FPGA board suitable for running the cores. I accept there would be less need for the the Ethernet of the MiniMorph boot loader on the DE2, but heh better 2 than none.
I already have the Mac Classic in mind for later. Do you know of an open FPGA version of the Mac Classic ?
I do not know hardly anything about the Sun. I did use a 68000 workstation in the 80's at college. It was for designing logic for Programmable chips ;). I am not sure if it was a Sun however. Do you know of any FPGA projects for Sun Workstations ????
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I think both Mac68k and Sun3 is quite simplistic in their design compared to Amiga. After all there's a reason for the fame of Amiga.
I think the linux sources for Mac/68k might be of interest.
68000 based macs:
http://en.wikipedia.org/wiki/Compact_Macintosh
Same for Sun-3.
-
I have a Sun-3/60 if anyone wanted actual hardware to compare an emulation against. It needs some love as it was pulled from a skip :lol: but there's nothing thats seems irreperably damaged.
Andy
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The cores for Tobiflex' ports to the Terasic DE1 and DE2 boards are now available for download at my
website (http://home.hetnet.nl/~weeren001)
Have fun :-D
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Thanks Dennis & TobiFlex. Although I'm building Dennis' v1.1 MiniMig all of thise softcore cpu development is still extremely interesting and cool :-) Downloading them now and I've downlaod the core from opencores.org!
Andy
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Well done Tobiflex and Dennis.
A Historic day in the Retro FPGA world to see such a fantastic core that runs on a virtually unmodified PCB that only costs 150 USD. Minimig's for all now :D
When the RTL is released too, I will try and port it to my two Xilinx boards and pass them back to Dennis for his page.
Those boards are not as good as the Altera ones for this core as they do not have an SDCARD slot. The Xess one only does 512 colours too, but this can be fixed by adding three resistors I guess !
In the meantime I WILL order a DE1 for sure now.
Is there any preference on type of mouse that is needed ?
In the meantime a slightly less important thing will be happening tomorrow when the Dev boards for my MiniMorph boot loader will arrive. I will be one step closer to adding Ethernet to the Minimig.
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Dennis wrote:
The cores for Tobiflex' ports to the Terasic DE1 and DE2 boards are now available for download at my
website (http://home.hetnet.nl/~weeren001)
Have fun :-D
EEEEEEEXCELLLENT!! GREAT WORK!!
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I have just ordered 5 Altera DE1 boards from Taiwan.
I will sell a couple of them on in the UK if there is interest. I could sell them privately or on Ebay.
I could probably do the mouse keyboard mod on the boards and I will see if I can get some y cables as well. I will need then anyway.
Good news for my boot loader too. My development boards for that arrived today. I can actually run some code now !
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MiniMorph wrote:
I have just ordered 5 Altera DE1 boards from Taiwan.
I will sell a couple of them on in the UK if there is interest. I could sell them privately or on Ebay.
I could probably do the mouse keyboard mod on the boards and I will see if I can get some y cables as well. I will need then anyway.
Good news for my boot loader too. My development boards for that arrived today. I can actually run some code now !
Good to hear that your project is coming along, will you be sharing the re-design as you go or just at the end once you've worked all of the kinks out? I'm just getting to grips with gEDA (never used schematic software before) and trying to get everything setup correctly with the minimig sym files etc then trying things out in baby steps.
On a side note, damn this stuff is complicated when you're newbie, does anyone know of any good introductory guides!?! I've got it mostly installed and setup on Ubuntu, got the custom sym files from Dennis' site loading in ok and seemt o have teh schemtic loading with all of the components but an actual guide to using gEDAs gschema tool would be nice.
Andy
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AJCopland wrote:
MiniMorph wrote:
I have just ordered 5 Altera DE1 boards from Taiwan.
I will sell a couple of them on in the UK if there is interest. I could sell them privately or on Ebay.
I could probably do the mouse keyboard mod on the boards and I will see if I can get some y cables as well. I will need then anyway.
Good news for my boot loader too. My development boards for that arrived today. I can actually run some code now !
Good to hear that your project is coming along, will you be sharing the re-design as you go or just at the end once you've worked all of the kinks out? I'm just getting to grips with gEDA (never used schematic software before) and trying to get everything setup correctly with the minimig sym files etc then trying things out in baby steps.
On a side note, damn this stuff is complicated when you're newbie, does anyone know of any good introductory guides!?! I've got it mostly installed and setup on Ubuntu, got the custom sym files from Dennis' site loading in ok and seemt o have teh schemtic loading with all of the components but an actual guide to using gEDAs gschema tool would be nice.
Andy
I've been having an issue getting gEDA to read the gerber files myself.
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I will share the code for the Minimorph Loader when it does useful things. I will be making both binary builds and the source code available.
It is some way off being useful. I am unsure how much work will be involved in modifying Tobiflex's design to be more like the Original Minimig where it communicated with the PIC. I need the SDRAM and 68000 core from Tobiflex's design but set up to talk to an external boot loader like Dennis's design.
-
@AJCopland:
Try: http://www.geda.seul.org/docs/current/tutorials/gsch2pcb/tutorial.html
'gerbv ..' is the tool to view gerbers btw.
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downix wrote:
I've been having an issue getting gEDA to read the gerber files myself.
I haven't got that far yet :-D might try that tonight since I seem to be too ill for going out and partying like Plan A had me doing :-(
Once I've had a go I'll report back. Will be happy if i can just get it to load up the schematic and all the syms correctly etc allowing me to edit things. My reasoning is that if I get each prior stage in the process to work then each subsequent one _should_ just fall into place.
I'm optimistic by nature like that :lol:
Andy
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@freqmax
Thanks mate!
-
I just realized we have a nice pile of free DE2s here at school.
I gotta try this out!
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Hi there,
just wanted to give props to Dennis and Tobi. Great work.
I'm AmigaFan and do VHDL programming as my daily business.
So I'm already following the minimig development for a while.
Unfortunately I don't have much time, so I didn't get to build myself a minimig board yet. I already thought about using
a development board. So that's great news, that someone already did it :-)
Have you seen the new Altera Nios2 Devkit, it's a CycloneIII based board and it comes with a nice Color LCD 800x600,
audio, vga, 32MB DDR, SD-CARD etc. And you can order it from resellers in
Europe :-)
http://www.altera.com/products/devkits/altera/kit-cyc3-embedded.html
Ok, it's a bit more expensive than the DE1 but cheaper than the DE2.
I think that's probably a good alternative.
Cheers, xmag
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xmag32 wrote:
Have you seen the new Altera Nios2 Devkit, it's a CycloneIII based board and it comes with a nice Color LCD 800x600,
audio, vga, 32MB DDR, SD-CARD etc. And you can order it from resellers in
Europe :-)
http://www.altera.com/products/devkits/altera/kit-cyc3-embedded.html
Ok, it's a bit more expensive than the DE1 but cheaper than the DE2.
I think that's probably a good alternative.
Xmag32, the Nios2 does sound like a good board. Is that colour LCD included in the price, or can you buy the board without the LCD screen?
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Hi Henry,
the board is essentially the same as the Cyclone III Starter Kit. Altera boards got a quasi standard connector for daughter boards(HSMC). The daughter board includes the colour lcd and all the legacy ports, so you won't get around it, if you want to have the minimig running. I think it would be cool to have the minimig running on the colour lcd :-) The board is quite small. I've one in the office, but unfortunately without the daughterboard.
EDIT:
I just found out that Terasic has designed the daughter board for the starter kit. You can find it on the
terasic home page as "Nios II Embedded Evaluation Kit - Upgrade Package"
Cheers, xmag
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I don't really know what all the big technical words and numbers mean, but it's still exciting to see everyone getting excited about something. It's like a revitalization of the community type deal. Go home brew go! :hammer: :banana:
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xmag32 wrote"
I think it would be cool to have the minimig running on the colour lcd
Yes it would be cool. But you cant here build a Joystick adapter an you need also the patch for the PS2 Conntector to use Keyboard and mice simultanos.
I think the best choose is the DE1 Board and this LCD Screen:
Terasic LCD Screen (http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=39&No=213)
or an other.
But I have no plans to do this next time.
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Hi Tobiflex,
don't you think it might be possible to just misuse the rs232
connector for the amiga joystick. I dont'know how many pins of the connector are wired to the fpga.
Cheers, xmag
-
That would be particularly cool if the touch screen could be connected as the mouse. Then all we would need is a clamshell case with a keyboard in the bottom half and a battery.
This would give us a very small MiniMig laptop. Although I'll be happy enough when I get a DE-1 here to play with.
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xmag32 wrote:
don't you think it might be possible to just misuse the rs232 connector for the amiga joystick. I dont'know how many pins of the connector are wired to the fpga.
No chance!
There is no direkt connection between rs232 connector and the FPGA. The rs232 ist connected to a Level Shifter. Remeber the rs232 signals are +/- 12V.
-
hm,
yeah you're right, I just took a view at the specs of the daughter board. I'm not sure to which pin's could be reused for the joystick. Where did you connect pin2/6 of the ps2 connector on the DE2? And are there any spare pin headers on the board. On the Cyclone III starter kit, one could use the pushbuttons as joystick replacement, but there are only four of them. So we're still missing the fire button.
EDIT: ok, took a look at the de2-specs, there are many spare pins. So that's definitly a plus for this board :-)
Cheers, xmag
-
xmag32 wrote:
Where did you connect pin2/6 of the ps2 connector on the DE2? And are there any spare pin headers on the board.
Now I have finish the doku for the MICE/JOYSTICK Adapter for the DE1 and DE2 Board.
EDIT:
Please wait for a new Schematic. Please check the Mice connector.
-
Great Work TobiFlex!
My 5 Altera DE1 boards arrived today :D
So I can try it when I get home!
-
Slightly OT: But does anyone happen to sit on a few Hirose FX2 receptables? (FX2 100S 1.27DS)
-
(http://minimorph.com/images/amigade1.jpg)
I have my DE1 board doing something now!
Thanks Tobiflex and Dennis.
I have a big problem now.
I have never used an Amiga before :-?
I still have 4 boards fresh in their box.
-
TobiFlex wrote:
xmag32 wrote:
don't you think it might be possible to just misuse the rs232 connector for the amiga joystick. I dont'know how many pins of the connector are wired to the fpga.
No chance!
There is no direkt connection between rs232 connector and the FPGA. The rs232 ist connected to a Level Shifter. Remeber the rs232 signals are +/- 12V.
IMHO, the best way to connect the mouse/keyboard/joystick is to use an external microcontroller like an SX chip to mux all the I/O signals into one serial link through the PS2 connector.
-
@MiniMorph
That's a great picture, great to see the device working. Looks like you're almost as untidy as me too! ;-)
I am tempted to buy one of those DE1s off you. Just got two questions:
1. How much are you selling for (I'm in the UK too by the way)?
2. How full is the FPGA when running TobiFlex's Minimig implementation?
Thanks in advance.
-
According to Tobiflex on this very thread the DE1 is 73% full with the MiniMig in it.
When the RTL is released I will find out for myself.
I will need the RTL to get it working with my Minimorph Boot Loader. The code will not be ready for a month or two however so there is no rush.
I am not quite sure how much the DE1 boards have cost me yet. I will try and get round to working it out. I have also got the mouse/ keyboard splitter cables on order I should have them by the end of the week.
I have an MSX core on my PC for the DE1 too (Not mine you understand). A certain guy from Australia claims to have quite a few cores for the DE1.
I have MikeJ's VIC20 running on one of my Xilinx boards so a port to the DE1 is on the cards. I will have to search out a C64 too.
All the best.
-
MiniMorph wrote:
When the RTL is released I will find out for myself.
DE1 and DE2 Minimig complete Source Code is available now.
Look here:
minimigtg68 group (http://gamesource.groups.yahoo.com/group/minimigtg68/)
Viele Grüße
TobiFlex
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So, could you use the Nios II Embedded Evaluation Kit, or is it best to stick with the DE1 or 2?
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webmany wrote:
could you use the Nios II Embedded Evaluation Kit
I don't know. The Bitstream files for the DE1 and DE2 are ready to use. For the Nios II Embedded Evaluation Kit you must do it yourself.
The minimigtg68 is Open Source. Have a go at it!
Viele Grüße
TobiFlex
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I think you can use whatever kit you like as long as you can recompile the VHDL/verilog to fit within the fpga that it uses AND use the ports that it has for input etc.
Honestly though thats just a guess :)
Andy
EDIT: ah I see that TobiFlex has already replied about it :-D
-
Tobiflex's design is only suitable as is, for Altera boards with a similar SDRAM and SD Card.
The top level is done with schematics which does not port so simply to another toolchain.
The Nios II Embedded Evaluation Kit would seem suitable but YMMV.
I notice that board has synchronous SRAM and you need a two board set to do any real work. I also wonder if there would be any free FPGA pins left to do the Joysticks and extra PS/2.
All the best.
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freqmax wrote:
@MiniMorph:
We'r missing Macintosh 68k, and Sun-3 :-D
Perhaps studying the source code for the software Basilisk II (http://basilisk.cebix.net/) emulator would help in developing Mac Classic HDL?