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Amiga computer related discussion => Amiga Hardware Issues and discussion => Topic started by: FrenchShark on November 23, 2007, 02:36:08 AM

Title: 680x0 behaviour question
Post by: FrenchShark on November 23, 2007, 02:36:08 AM
Hello,

I am trying to make a 680x0 emulation in VHDL.
I have a question concerning the shift operation:
- Freescale documentation says : the shift value is modulo 64.
- The 68k emulator I am using (EASy68k) uses a shift value modulo 32.

Can someone execute the following code under AsmOne (with a real Amiga !)? :

moveq  #39,D0
move.l #$000000FF,D1
lsl.b  D0,D1
rts

According to Freescale, D1 must contain $00000000.

Regards,

Frederic
Title: Re: 680x0 behaviour question
Post by: AmiDog on November 23, 2007, 06:57:36 AM
Not in front of my Amiga right now, but yes, shifts on the 680x0 and PPC are modulo 64 while they are modulo 32 on x86 and MIPS while ARM seems to use modulo 256...
Title: Re: 680x0 behaviour question
Post by: ChaosLord on November 23, 2007, 08:16:26 AM
Using Devpac on my Amiga Real Machine (68060)
D1 ends up with $00000000
Title: Re: 680x0 behaviour question
Post by: Piru on November 23, 2007, 11:48:55 AM
Quote
The 68k emulator I am using (EASy68k) uses a shift value modulo 32.

Ouch. Maybe you should use some more proven emulation, such as the one in UAE?
Title: Re: 680x0 behaviour question
Post by: FrenchShark on November 23, 2007, 04:05:54 PM
@ChaosLord

Thank you, it looks like I found a bug in EASy68k :-)

@Piru

I did not want to install UAE just for few lines of ASM testing.

Anyway, thank you guys.
I can finish the ALU shifter now (the hardest part is actually the V flag management).

Frederic
Title: Re: 680x0 behaviour question
Post by: ChaosLord on November 23, 2007, 04:16:42 PM
I think he meant "look at the source code of UAE"  :-)
Title: Re: 680x0 behaviour question
Post by: ChaosLord on November 23, 2007, 04:19:48 PM
How fast can your VHDL chip go?
Could it do 25Mhz?
Title: Re: 680x0 behaviour question
Post by: alexh on November 23, 2007, 04:24:07 PM
Quote

ChaosLord wrote:
How fast can your VHDL chip go?
Could it do 25Mhz?

VHDL isnt a chip, it's a language. The speed it synthesises to is dependant on the FPGA (or ASIC technology) it is going to be implemented with.

Name an FPGA and I am sure that he'll be able to tell you what speed it will run at in that FPGA.
Title: Re: 680x0 behaviour question
Post by: ChaosLord on November 23, 2007, 04:33:18 PM
In that case I would like to ask which FPGA chip is he going to use?

And how many cycles does it take to do a moveq #0,d0 in your implementation?
Title: Re: 680x0 behaviour question
Post by: FrenchShark on November 23, 2007, 04:33:30 PM
I am the lucky owner of a Stratix II board :-).

I want to create a risc CPU with the ALU of a 68000.
If I do it well, I should achieve 100+ MHz operation, with the emulation layer this should translate to 10-20 MIPS.
Title: Re: 680x0 behaviour question
Post by: FrenchShark on November 24, 2007, 07:00:25 PM
Hello,

I have a second question, does the following code set the X, N and C flags ?

        MOVEQ   #9,D0
        MOVE.L  #$FF,D1
        ASR.B   D0,D1
        RTS

The emulator just set the N flag.

Title: Re: 680x0 behaviour question
Post by: ChaosLord on November 24, 2007, 07:26:39 PM
ccr #$00000019 ac ng nz nv cy
Title: Re: 680x0 behaviour question
Post by: FrenchShark on November 24, 2007, 08:09:32 PM
Thank you!

another bug in EASy68k :-)
Title: Re: 680x0 behaviour question
Post by: Piru on November 24, 2007, 09:07:20 PM
Quote
I did not want to install UAE just for few lines of ASM testing.

Well, winuae + asmone can be quite handly when quickly testing stuff. And WinUAE 68k emulation is quite accurate, at least more than that of the EASy68k.

WinUAE emu still has some small differences to the real thing, but nothing really important.