A2080 i.e. Vampire 500 V2 on an Amiga 2000

[JimDrew]

Exactly. It's nice and cool with the 68080, but as long as it remains 68EC080, without FPU and without MMU - what does it hold over emulation?

Well, for one it runs on real hardware.

Secondly, it's faster than 132MHz PPC PowerMacs from back in the day when running FUSION.  No need for PPC... it's junk anyways.

[JimDrew]

PPC is not junk, but neither is a good 68K machine

Oh no, trust me... PPC is junk.  I know it quite well!  I would use an x86 over a PPC any day.

[JimDrew]

Yep, lots of hardware designs and products besides the software I have written.

PPC is just too confined being RISC (too many instructions required to be productive compared to CISC).  When I was working on the Motorola coreless CPU project (basically a Xilinix clone with a microcode code engine that could be programmed), we got the CPU speed of the 68K emulation much faster than the 060 (much like Gunnar has done now with the Apollo core).  It had the ability to swap endians and anything we wanted to do.  Unfortunately, IBM really pushed the PPC architecture and that was the way Motorola went.

My 68040 core (with FPU and MMU) I wrote for FUSION-PC under Virtual Box for Windows runs circles around the Apollo core and WinUAE w/JIT on my 4930K Intel setup.  Most benchmark programs break due to the speed.  So, yes a CPU core running even on a low-end Intel or AMD CPU would make a better accelerator option.  Powering it would be the problem though, so I don't see this as a real viable option without having a lot of extra power supply related hardware.

[JimDrew]

One of the things that was added to the Apollo core is the ability to reorder any bits using a single instruction.  There is also the capability to move from memory to a register (vice versa) doing a byte swap and/or word swap.

PCx is the PC emulation that I wrote.  Intel is in fact backwards endian from Motorola.  So, every word and longword fetch for the instruction look to emulate the x86 CPU requires byte/word swapping.  This adds a lot of extra time.  So, I made a version of PCx for the Vampire board that uses the new instructions... I see maybe a 5% increase in speed over the stock PCx.  Why?  The pipeline architecture is so good in the Apollo core that swaps are virtually absorbed.

[JimDrew]

One of the things that was added to the Apollo core is the ability to reorder any bits using a single instruction.  There is also the capability to move from memory to a register (vice versa) doing a byte swap and/or word swap.

PCx is the PC emulation that I wrote.  Intel is in fact backwards endian from Motorola.  So, every word and longword fetch for the instruction look to emulate the x86 CPU requires byte/word swapping.  This adds a lot of extra time.  So, I made a version of PCx for the Vampire board that uses the new instructions... I see maybe a 5% increase in speed over the stock PCx.  Why?  The pipeline architecture is so good in the Apollo core that swaps are virtually absorbed.  Kuddos to Gunnar.