The possibilities hasn't been explored yet. Getting 68000, 68020, OCS, ECS, AGA, Paula, etc to happen in HDL since 2006 is a huge task. That also means not a lot of time has really been spent on the CPU specifically. The "68020" is essentially a TG68 quickfix because there were some worries that AGA required 32-bit CPU and datapath to even work at all.
The 68060 uses lot's of bit juggling, time for the FPGA version to do so to. I guess the only real rule is to make sure the op-codes are acted on as fast as possible.