Exception stack frames are and FPU will be compatible with the 040. Contrary to 040 and 060 no instructions need to be trapped. For 882-only instructions there will be essentially what is inside the 040.library for FPU-emulation of those complex FPU-instructions but this will be inside a ROM where it can't be overwritten.
If no instructions are trapped, what is the ROM good for if not for trapping the instructions? Ok, the mechanism is probably not a 68K trap in the strict sense, but why does that make any difference.
I just remember the uproar when Phase5 dared to put their 68060.library into ROM... a RAM-based library is more flexible, and simpler to replace in case of bugs. (Says me, who had bugs in 10 year old code of my 68060.library).
Thus, the FPU will appear as being 882-compatible directly after power-on with no libs loaded. However, 040-FPU-code will execute faster than code compiled for 882 as it avoids the internal trapping mechanism.
Huh, and then how does the CPU reach the ROM code? Why does it make a difference whether the CPU takes a "regular exception vector" or some "hidden vector" in terms of performance or compatibility?
All in all the 080 is far more compatible than any of 040 or 060.
Really? Just because you put something in ROM that was otherwise in RAM? Sounds like a strange argument to me. Instead, you introduce a potential source of problem with having more registers that somehow have to be saved and restored on a context switch when they are used.