A project I'd like to see from Jens...

[matthey]

simple: universal turboboard for every amiga multiple times faster than any existing accelerator and that for affordable money. am i right or am i right?

I thought that was already planned with Majsta's next accelerator for the 500/2000/1000 and using the Apollo core .

[matthey]

You could theoretically already make "replacement" 6581's.

VHDL code for 6581 equivalent is available here:
http://code.google.com/p/netsid-papilio/source/browse/trunk/doc/original_sid_src/sid_6581.vhd?r=2

But would the all digital fpga sound the same? It may sound too clean where many SID enthusiasts prefer distortion. Even the different versions of the real SID chips sounded different. The VHDL for a 6581 is small enough that it has been considered for adding to at least one Amiga fpga board. The SID has some unique abilities that Paula can't do. It would make an interesting combination for sound as well as making C64 emulation easier.

[matthey]

sounds like majsta run into problems:

It's not like he has made it this far without struggling at times .

however jens has actually proposed help with the project (in therms of hardware i guess), if it turns out genuine, even though remaining rather aggressively skeptical for the time being:

"Aggressively skeptical" is putting it nicely. Jen's legitimately seemed to believe that good performance from a 68k core in an fpga was not possible. It seems you were right about Jens being set on MIPS or ARM for a future CloneA type project before the news of Phoenix/Apollo. Now he is probably less skeptical and more open to a 68k fpga core. It makes a lot of sense for them to work together. It's not cheap to buy hard 68k chips in quantity anymore for accelerators. Jens has the experience and skills to make high end accelerators and standalone fpga boards. The Apollo Team has a fast fpga 68k that would make them sell. I believe that Jens and the Apollo 3 live in the west/southwest of Germany (black forest area?) making it easier to get together too. Jens and Gunnar are very head strong though. I don't know how that would work out.

also thor is supporting the case (within limits):

I never doubted that ThoR would help if there was going to be any kind of functional MMU. I hope ThoR gets more involved with an MMU design. That thread wasn't very long but it might not be over yet. I wish my German was better.

[matthey]

For A500/ A1000/ A2000 / CDTV.

Card specs are:

* very fast 68K CPU
* 128 MB DDR3 Fast-memory
* SD-card usable/bootable as IDE-device
* Network interface
* RTG Graphics Card (chunky/Hicolor/truecolor) with HDMI out

The physical card design is done.
Testing / Driver development needs to be done.

The boards are in production/shipment.
We expect to receive them this week.

Sounds good. That would be nice if we could get it to work in all Amigas with a socketed 68000 chip. I don't have a CDTV for testing but I do have a 500, 1000 and 2000 .

[matthey]

aha. the card is supposed to go into the cpu socket.  too simple for me to figure out..

The 68000 socket should give a reliable connection. The number of Amiga computers with socketed 68000 processors is quite large too.

cha ching...magic word for me was finally something for the one and only AMIGA, The Amiga 1000:knuddel: now if you tell me it's goona give us A1000 owners more chipram then i'll really be over the moon:insane:

Sorry, no chip memory, but RTG gfx instead. Well, technically, it may be possible to create a whole AGA chipset in fpga with it's own chip memory and outputting to the DVI/HDMI but that would be a lot of work. A chunky buffer with P96 driver output to the DVI/HDMI would be a lot easier and provide more usable 16/32 bit screen modes. We will have to see what can be done with the kickstart loading on the 1000. Some kind of networking interface for the 1000 is interesting also. Making a 30 year old Amiga usable again would be quite the retro time warp B-).

[matthey]

The FPGA Arcade Replay board is only in tester's hands right now.  I wonder how likely a Replay board add-on version based on the Sockit would be, given that the Cyclone 5 is likely more advanced than the FPGA on the Replay board.  I'd love a solution like this because it would free up space on the Cyclone for MMU and FPU while freeing up space on the Replay board for better graphics card emulation.  ;-)

The fpgaArcade fpga is big enough for CPU+MMU+FPU+AGA. Fitment might start to get tight with more advanced and pipelined versions of the processors. The Cyclone V should have even more room which makes development easier and allows for larger caches.

[matthey]

What FPGA does the Cyclone-5 use?

The Cyclone V is an Altera fpga.

Vampire 500/1000/2000/CDTV fpga
Brand: Altera
Family: Cyclone V
Model: unknown (to me)

fpgaArcade fpga
Brand: Xilinx
Family: Spartan-3E
Model: XC3S1600E

[matthey]

Guess that makes doing VHDL/Verilog development on Linux a hard choice.

Why? Gunnar uses Quartus under Linux for development.

[matthey]

Yeah there is a licensed pay version asfaik. Xilinx is free for all Spartan-3E (XC3S__E).

I believe Quartus is free for the whole Cyclone family. You may have to pay to synthesize for the Arria and Stratus.

[matthey]

S-ATA is the way to go these days. Because the ATA interface has evolved to have some technical decency and it's the option with reasonable prices. SAS (serial SCSI) cost a fortune in comparison.

SATA would be nice but the high speed transceiver lines require a more expensive fpga and are limited. PCIe also need the same lines. A standalone fpga board may get these later but an SD card is adequate for most retro storage space requirements, it's tiny, it's common and it's low power (Hopefully no need to upgrade the power supply of a 500).

Regarding the 68060. To compete with the real thing any CPU would have to be as fast as 68060 @ 75 MHz. And then one has to make the decision if one should skip those instructions that Motorola did. Not doing it may cause incompatibilities but it may actually be a better processor. So perhaps an configuration option would be suitable.

Competing with the 68060 in speed shouldn't be a problem. Apollo will have several advantages:

much larger instruction fetch
stronger integer pipes
more instructions that can execute in both pipes (pOEP|sOEP)
code fusion/folding
some OoO instruction execution (MUL and DIV)
link stack (faster rts)
upgraded ISA and 64 bit MUL/DIV integer instructions return
much faster bit field instructions
much bigger caches (helps a lot with big programs)
faster memory

Phoenix will probably be available first without some of these advantages but most of these are in or provided for in the current Apollo design. The 68060 was a great processor for back in the day. It solved most of the 68k limitations with limited resources. It should have been the foundation for a series of new 68k processor designs but it was not fully optimized internally yet and was not given the resources to become more powerful. There is significant room for improvements.