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Author Topic: One small step for Natami. One large step for Amigaland!  (Read 17500 times)

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Offline DCAmiga

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Re: One small step for Natami. One large step for Amigaland!
« on: April 28, 2011, 05:57:43 PM »
Quote from: lou_dias;634143
http://www.natami.net/knowledge.php?b=1¬e=37264
Thanks Lou :cool:
Would have like to seen some actual screenshots of WB fast/chip mem, and system info etc, But this is a Daily Diary so maybe soon.
 
Quote from: Franko;634144
Vote Now:- Annika for Queen Of Amigaland... :)
She is adorable has my vote :)
Amiga 500, 1/2 Meg Trap Door, RocTec HD, Slim External Floppy (DF1), KS Switcher: KS 1.3 & KS 2.04 (1987-1995)
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Offline DCAmiga

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Re: One small step for Natami. One large step for Amigaland!
« Reply #1 on: May 08, 2011, 06:33:50 PM »
Natami MX gets a First True Enhancement :D
Posted by Thomas Hirsh:
 
First true enhancement

For the first time on the MX board it is getting exciting, even for me. Till now I was "only" adapting the LX design to the new board. OK, by doing that I made quite huge progress in stability and usability. The board can now even be operated stand-alone. But this were just all the many mandatory things needed for the completeness of the system itself. But now... I was able (and had the time) to improve, or rather extend ECS. As you (hopefully) know, OCS had a hard wired frame generator. Because of that there were two different Agnus chips, one for NTSC and one for PAL. With ECS this issue was resolved in a quite superior manner. They did not only implement a NTSC/PAL switch but also added a complete set set of frame generation registers. From that on there was no limitation to the screen size anymore. Even the A2024 resolutions (1024x1024) were possible. This was a lot more than a common PC could offer that time (in 1988).

With the ECS frame generator it was even possible to display some VGA screen modes as 640x480. But there was still one limitation. The pixel clock was limited to fixed 28MHz. For the A2024 this was no problem, the refresh rate was set to 10Hz and the monitor itself had a built in frame buffer to display the image content at a much higher frequency. VGA and Multisync monitors had no internal memory. So this technique could not be used and resolutions that high as the A2024 were not possible to display on them. And even the 800x600 resolution needed to be in interlace because of the in comparison low pixel frequency. AGA did increase the color depth and the overall number of colors available, but left the pixel clock unchangeable.

The pixel clock on the Natami is not generated by an external oscillator. It is synthesized by a programmable PLL (Phase Locked Loop). Its frequency can be changed at run time. I now implemented an interface which allows the PLL being accessed through DFF registers. With that I am able to set up a basic screen resolution of 1280x1024 in 60Hz for a functionality test. Not system friendly, just a part of a memory field and mouse pointer. But it actually works. I have known it from the beginning that it is possible and will work, but seeing that the Natami can now match the native resolution of my test TFT is something different! I`ll send a design update to Annika as soon as I can.

And the second good news is that with the new resolution I was able to confirm that the digital portion of DVI is also working.


Chipset Features
  (new) Frame generation .......... ECS and variable pixel clock -> UCS
        SyncZorro Interface ....... preliminary version
        Copper .................... fully implemented, with buffered data fetch
        Video DMA ................. fully implemented
        256 color registers ....... fully implemented
        AGA HAM8 .................. fully implemented
        Sprites ................... 16bit linebuffer
        blitter ................... basic implementation. Block and fill mode only, line to come
        Video priority ............ half implemented
        Scandoubler ............... fully implemented
        Interrupts ................ fully implemented
        Paula DMA control ......... fully implemented
        Audio out ................. fully implemented
        Disk DMA .................. 880k and 1760k, read only
        Serial Port Paula UART .... fully implemented
        Slow peripheral I/O ....... fully implemented
         (Joy/Mouse/Keyb/PRT/DSK/SER)
        PC mouse and kbd support .. o
        CIAs ...................... fully implemented
 
  Board Features
        VGA out (DVI-A) ........... working
  (new) DVI out (DVI-D) ........... working
        PCI ....................... transfer only, arbiter and config missing
        IDE ....................... PIO mode 0 working
        Compact Flash connector ... o
        NEC USB PCI ............... o
        RTL 8110 LAN .............. o
        Battery-backed up clock.... working
        15k Video out (module) .... o
        15k Video in (module) ..... o
        Audio in .................. ohttp://www.natami.net/knowledge.php?b=1¬e=33366&x=14WTG Thomas!!
Amiga 500, 1/2 Meg Trap Door, RocTec HD, Slim External Floppy (DF1), KS Switcher: KS 1.3 & KS 2.04 (1987-1995)
PeeCee Box, W7 - WinUAE
Dell Inspiron 14R - laptop
Sony PS3
Sony PSP
Nintendo Wii
Nintendo 3DS